Patent
Diffusion layer for stressed semiconductor devices
Hao-Yu Chen,Shui-Ming Cheng +1 more
- 14 Feb 2006
16
TL;DR: In this article, a diffusion layer for semiconductor devices is provided, which comprises doped regions surrounded by a diffusion barrier, and a silicon layer may be epitaxially grown over the diffusion barrier in the recessed regions.
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Abstract: A diffusion layer for semiconductor devices is provided. In accordance with embodiments of the present invention, a semiconductor device, such as a transistor, comprises doped regions surrounded by a diffusion barrier. The diffusion barrier may be formed by recessing regions of the substrate and implanting fluorine or carbon ions. A silicon layer may be epitaxially grown over the diffusion barrier in the recessed regions. Thereafter, the recessed regions may be filled and doped with a semiconductor or semiconductor alloy material. In an embodiment, a semiconductor alloy material, such as silicon carbon, is selected to induce a tensile stress in the channel region for an NMOS device, and a semiconductor alloy material, such as silicon germanium, is selected to induce a compressive stress in the channel region for a PMOS device.
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Citations
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References
Patent
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Yee-Chia Yeo,Fu-Liang Yang,Chenming Hu +2 more
- 07 Feb 2002
TL;DR: In this paper, a tensile or compressive strained channel region for a semiconductor device, such as a MOSFET device, allowing improved carrier transport properties and increased device performance to be realized, has been developed.
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Patent
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Chih-Hsin Ko,Wen-Chin Lee,Yee-Chia Yeo,Chun-Chieh Lin,Chenming Hu +4 more
- 05 Dec 2003
TL;DR: In this article, the first and second active regions of a semiconductor chip are disposed by a resistor and a doped region between two terminals, and a strained channel transistor is formed in the second active region.
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Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs
Kern Rim,K.K. Chan,Leathen Shi,Diane C. Boyd,John A. Ott,N. Klymko,F. Cardone,Leo Tai,Steven J. Koester,Michael A. Cobb,Donald F. Canaperi,B. To,E. Duch,I. Babich,R. Carruthers,P. Saunders,G. Walker,Y. Zhang,Michelle L. Steen,Meikei Ieong +19 more
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TL;DR: In this article, a tensile-strained Si layer was transferred to form an ultra-thin (<20 nm) strained Si directly on insulator (SSDOI) structure and electron and hole mobility enhancements were demonstrated.
216
Patent
Methods to fabricate MOSFET devices using a selective deposition process
Arkadaii V. Samoilov,Yihwan Kim,Errol Antonio C. Sanchez,Nicholas C. Dalida +3 more
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TL;DR: In this paper, a substrate is exposed to at least two different process gases to deposit one layer on top of another layer, and the next process gas contains silane and an etchant.
181
Patent
Method to produce localized halo for MOS transistor
Kaiping Liu
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TL;DR: In this article, the authors proposed a gate structure over the semiconductor substrate, wherein a dopant material is implanted at an angle around the gate structure to form a halo structure in a source/drain region of the substrate and underlying a portion of the gate.
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