Journal Article10.1109/54.825674
Designing and debugging custom computing applications
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TL;DR: This article reviews these techniques and introduces JHDL, a design tool that exploits these and other verification aids and is introduced as a novel verification tool for custom computing machines.
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Abstract: Custom computing machines offer unique opportunities for verification. This article reviews these techniques and introduces JHDL, a design tool that exploits these and other verification aids.
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TL;DR: In this paper, a configurable trigger circuit that receives a set of configuration data that specifies an operational event is used to determine whether the event has occurred during implementation of the user design of the IC.
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Patent
Runtime loading of configuration data in a configurable IC
Brad Hutchings,Jason Redgrave,Teju Khubchandani,Herman Schmit,Steven Teig +4 more
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TL;DR: In this paper, a configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC, where the configuration network is a pipelined network and a configuration controller for retrieving configuration data from outside the IC and routing the configuration data sets to the second set of configurable circuits over the network.
46
A design flow for partially reconfigurable hardware
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TL;DR: Computer-aided design tools are presented, which complement conventional FPGA design environments to enable the specification, simulation, synthesis, automatic placement and routing, partial configuration generation and control of partially reconfigurable designs.
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References
•Book
Splash 2 : FPGAs in a custom computing machine
Duncan A. Buell,Jeffrey M. Arnold,Walter J. Kleinfelder +2 more
- 01 Jan 1996
225
Teramac-configurable custom computing
Rick Amerson,Richard J. Carter,W.B. Culbertson,Phillip J. Kuekes,Greg Snider +4 more
- 19 Apr 1995
TL;DR: A configurable custom computing engine, based on field programmable gate arrays, to enable experiments on an interesting scale, using Teramac to conduct experiments with special purpose processors involving search of nontext databases.
129
The Splash 2 software environment
Jeffrey M. Arnold
- 05 Apr 1993
TL;DR: The architecture of Splash 2 is designed to accelerate the solution of problems which exhibit at least modest amounts of temporal or data parallelism, and has been shown to be effective on a variety of applications, including text searching, sequence analysis, and image processing.
100
XBI: A Java-Based Interface to FPGA Hardware
Steven A. Guccione,Delon Levi +1 more
- 08 Oct 1998
TL;DR: XBI(tm), the Xilinx Bitstream Interface is a set of Java (tm) classes which provide an Application Program Interface (API) into theXilinx FPGA bitstream, which provides the capability of designing, modifying and dynamically modifying circuits in XILinx XC4000 (tm).
86
Programmable active memories: reconfigurable systems come of age
TL;DR: This work exhibits a dozen applications where PAM technology proves superior, both in performance and cost, to every other existing technology, including supercomputers, massively parallel machines, and conventional custom hardware.