Patent
Debugging apparatus for debugging a program by changing hardware environments without changing program operation state
Motohide Nishibata,Yoshiyuki Iwamura,Fumio Sumi +2 more
- 19 Jun 1997
70
TL;DR: In this article, a debugging apparatus is disclosed which verifies a program to be embedded into a target machine by running the program in an environment which is one or the target machine, an emulator, and a simulator.
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Abstract: A debugging apparatus is disclosed which verifies a program to be embedded into a target machine by running the program in an environment which is one or the target machine, an emulator, and a simulator. Each environment includes operation state information of the program and inputs and outputs the operation state information in a form unique to the environment. The debugging apparatus includes; target environment storing unit for storing an identification name of the target environment; receiving unit for receiving a command from an operator; instruction detecting unit for detecting a certain instruction in the command; specifying unit for, when the certain instruction is detected, specifying a target environment specified by the identification name as a source target environment and for specifying any of the rest of the environments as a destination target environment; reading unit for reading operation state information from the source target environment; converting unit for converting the operation state information into operation state information written in a form unique to the destination target environment; setting unit for setting the converted operation state information in the destination target environment; and operation resuming unit for resuming the operation of the program in the destination target environment.
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Citations
Patent
System and method for synchronized control of system simulators with multiple processor cores
Ulrich Bortfeld
- 16 May 2000
TL;DR: In this article, a debugging environment for a multi-processor simulator or emulator is described, which is ideally suited for the development of embedded software and can contain multiple processor models, with each processor model representing a processor.
95
Patent
Programmable microcontroller architecture(mixed analog/digital)
Warren Snyder,Monte Mar +1 more
- 11 Oct 2010
TL;DR: In this article, a programmable array with both continuous time analog blocks and Switched Capacitor analog blocks are offered on a single chip along with programmable digital blocks, which can communicate together.
91
Patent
Rendering hypertext markup language content
Christopher Brichford,Edward R. Rowe,Kevin Lynch,Ethan Malasky +3 more
- 17 Oct 2007
TL;DR: In this article, the authors describe a method that includes rendering Hyper Text Markup Language (HTML) content, in an HTML rendering engine, to primitives of a vector graphics rendering engine.
82
Patent
Systems and methods for data stream analysis using embedded design logic
Richard E. Denker
- 12 Sep 2007
TL;DR: In this article, the authors present a packet-level analysis of a data stream device at a packet level using design logic, including the ability to detect the user selected value in the packet, located external to the data stream processing device.
69
Patent
Debugging support apparatus, a parallel execution information generation device, a computer-readable recording medium storing a debugging support program, and a computer-readable recording medium storing a parallel execution information generation program
Hirohisa Tanaka,Fumio Sumi,Kensuke Odani,Akira Tanaka +3 more
- 07 Jan 1999
TL;DR: In this article, a debugging support apparatus for a processor that executes a plurality of instructions in parallel displays lines of source code statements in a user program that are executed in parallel, so that a user can visually recognize which lines of a source code statement are executed.
63
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Stephen P. Sample,Bershteyn Mikhail +1 more
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TL;DR: In this paper, a method and apparatus for combining emulation and simulation of a logic design is presented, where simulation is performed by one or more microprocessors while emulation is performed in reconfigurable hardware such as field programmable gate arrays.
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Patent
System and method for simulation of computer systems combining hardware and software interaction
Jiefurii Jiei Bunza
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TL;DR: In this article, a system for simulation of target electronic systems combining interacting elements of hardware and executing software is presented, in part by physical emulation means and in part through abstract software simulation.
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Patent
Optimizing hardware and software co-simulator
Russell Klein,Peter Finch,Devon J. Kehoe +2 more
- 14 May 1996
TL;DR: In this article, a co-simulation optimization manager for both the hardware and software simulations is presented, with at least one segment of the memory being viewed as configured for having selected portions of the segment to be statically or dynamically configured/reconfigured for either unoptimized or optimized accesses.
49
A smoothly upgradable approach to virtual emulation of HW/SW systems
M. Borgatti,R. Rambaldi,G. Gori,Roberto Guerrieri +3 more
- 19 Jun 1996
TL;DR: A novel approach to the high-level system verification problem based on a hybrid hardware/software virtual emulation tool and a low-cost verification environment, with multiprocessing and multilanguage capabilities currently in use at University of Bologna, is described.
6