Patent
Data processing system for performing a debug function and method therefor
Joseph C. Circello,Klaus R. Riedel +1 more
- 30 Aug 1995
207
TL;DR: In this article, a debug module of a data processor (3) provides a parallel output port for providing internal operating information via a DDATA signal and a PST signal, which allows an external development system (7) to dynamically observe internal operations of data processor without assuming a type or availability of an external bus and without significantly impacting the efficiency and speed of the data processor.
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Abstract: A data processor (3) executes a real time trace function which allows an external development system (7) to dynamically observe internal operations of data processor (3) without assuming a type or availability of an external bus and without significantly impacting the efficiency and speed of the data processor (3). A debug module (10) of data processor (3) provides a parallel output port for providing internal operating information via a DDATA signal and a PST signal. The DDATA signal provides data which reflects operand values and the PST signal provides encoded status information which reflects an execution status of a central processing unit 92). Furthermore, the DDATA signal also provides captured instruction address program flow changes to allow external development system (7) to trace an exact program flow without requiring an externally visible address bus or an externally visible data bus.
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Citations
Patent
System and method for communicating with an integrated circuit
David Alan Edwards,Anthony W. Rich +1 more
- 25 Sep 2000
TL;DR: In this paper, the authors present a system and method for communicating with an integrated circuit that allows the integrated circuit to communicate debugging information and system bus transaction information with an external system.
248
Patent
Process for automatic dynamic reloading of data flow processors (dfps) and units with two-or-three-dimensional programmable cell architectures (fpgas, dpgas, and the like)
Martin Vorbach,Robert Münch +1 more
- 07 Oct 2002
TL;DR: In this paper, the first result data may be obtained using a plurality of configurable coarse-granular elements, and the first results may be subsequently processed using the plurality of configured granular elements.
177
Patent
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Martin Vorbach,Alexander Thomas +1 more
- 30 Aug 2004
TL;DR: In this paper, a data processing device comprising a multidimensional array of coarse grained logic elements processing data and operating at a first clock rate and communicating with one another and/or other elements via busses or communication lines operated at a second clock rate is described.
173
Patent
Data processing method and device
Martin Vorbach,Juergen Becker,Markus Weinhardt,Volker Baumgarte,Frank May +4 more
- 24 Jul 2003
TL;DR: In this article, the first result data may be obtained using a plurality of configurable coarse-granular elements, and the first results may be subsequently processed using the plurality of configured granular elements.
156
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Microprocessor having improved memory management unit and cache memory
Rajesh Chopra,Shinichi Yoshioka,Mark Debbage,David E Shafferd +3 more
- 01 Oct 1999
TL;DR: In this article, the permission for a memory access in a data processing system having a virtual cache memory and a translation look-aside buffer is discussed and a determination is made based on the logical address information of the memory access operation and the permission information associated with the access operation.
136
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TL;DR: A microprocessor comprises a processor element, a memory interface element, an IO interface, a debug support element, and an internal bus interconnecting all above elements as mentioned in this paper for easy debugging, it also comprises attached to the internal bus a registered boundary scan standard (JTAG) interface that accesses one or more scan chains inside the microprocessor.
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TL;DR: In this paper, an in-circuit emulator (ICE) for hardware/software development and debugging microprocessors is presented, which allows a user to follow a target system's program flow, to capture related processor information, to make program modifications, and allow the user to restart programs.
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Patent
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Robert S. Dreyer,Donald B. Alpert,Nimish H Modi,Mike J Tripp +3 more
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TL;DR: In this paper, an external command mode for directly accessing the execution unit, responsive to externally generated commands and instructions, is presented, where the user can examine and modify registers, memory, and I/O space without otherwise affecting their contents.
173
Patent
Data processor with real-time diagnostic capability
David Ruimy Gonzales,Gordon Carichner +1 more
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TL;DR: In this article, a diagnostic circuit (23) with a first-in, first-out memory (FIFO) for storing sequential states of an internal bus, such as a program address bus, is described.
166
Patent
Operating system debugger
William S. Huber
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TL;DR: In this article, the authors present a debugger that can identify and correct faults in an embedded operating system of a multi-programmable digital data processor having hardware-controlled process exchange.
136