Patent
Data input and output controller
Jacques Michel Jean Bienvenu,Jean-Claude Marcel Cassonnet,Marc Appell +2 more
- 28 Oct 1975
56
TL;DR: In this article, an input/output controller for an information processing system comprising a main memory, a central processing unit, a peripheral controller and a plurality of peripheral units coupled to the central processing units is disclosed.
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Abstract: There is disclosed an input/output controller for an information processing system comprising a main memory, a central processing unit, a peripheral controller and a plurality of peripheral units coupled to the central processing unit. In particular, the input/output controller comprises a plurality of physical channels disposed between the peripheral controller and the central processing unit, a plurality of logical channels for transmitting information with the central processing unit, and each uniquely associated with one of the peripheral units. The main memory stores a first table including a physical channel entry containing informaton relative to the plurality of physical channels and a second table including a logical channel entry containing information relative to the plurality of peripheral units. Further, there is included means for storing a channel control program to be executed by the input/output control system for selectively transferring data between the main memory and the peripheral controller by first connecting the input/output control system to a logical channel entry and placing the identified logical channel table into the means for storing for a subsequent execution.
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Citations
Patent
Digital computer with multi-processor capability utilizing intelligent composite memory and input/output modules and method for performing the same
Richard E. Morley
- 16 Jun 1978
TL;DR: In this paper, a digital computer with the capability of incorporating multiple central processing units (CPU's), utilizes an address and data bus between each central processing unit and from one to fifteen intelligent composite memory and input/output modules (MIO).
204
Patent
Microprocessor memory management and protection mechanism
Robert H. E. Childs,Jack L. Klebanoff,Frederick J. Pollack +2 more
- 14 Oct 1980
TL;DR: In this paper, a memory management and protection mechanism in which access to protected entitites is controlled is presented, where each task within the system operates at one and only one privilege level at any instant in time.
169
Patent
Data communications subsystem
Robert L. Rawlings,Morris G. Watson +1 more
- 15 May 1978
TL;DR: In this paper, a data communications subsystem consisting of a data processor having its own internal memory for storing data transfer routines; and autonomous memory dedicated to storing data transfers and control data; and a basic control module which includes a basic controller interface unit connecting a plurality of front-end controllers.
132
Patent
Communication control apparatus
Kiichiro Tamaru
- 29 Sep 1986
TL;DR: In this paper, the authors propose a communication control apparatus wherein the version number of a communication program in a packet accepted by a receive circuit is compared at a comparator with that of the local station.
100
Patent
Input/output data processing system
John A. Bayliss,George W. Cox,Bert E. Forbes,Kevin C. Kahn +3 more
- 28 Sep 1979
TL;DR: In this article, the authors propose an interface processor for providing an interface between peripheral subsystems and a generalized data processor, which enables data to be transferred between two address spaces by mapping a portion of the I/O address space into a part of the GDP address space.
86
References
Patent
Input/output control
William A Clark,Kent A. Salmond,Thomas S Stafford +2 more
- 03 Mar 1971
TL;DR: In this article, a plurality of channels for scheduling and executing input/output programs are provided, each capable of being logically connected to a device through a cross-point switch, and I/O tasks are placed in a queue common to the channels.
75
Patent
Method and apparatus for interfacing with a central processing unit
TL;DR: In this article, an interface unit for controlling the transfer of information between a plurality of data bearing lines, at least some of which are fed by input/output devices, and a central processing unit is presented.
22
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