Patent
Data communication system
Hiroaki Sato,Katsuhiko Hayashi,Toru Tateishi,Katsumi Murano,Takayasu Aoki +4 more
- 04 Jan 1994
38
TL;DR: In this article, an error correction code is inserted between an error detection code for a variable-length ARQ frame and a frame boundary flag pattern to provide a distinguished frame boundary with a flag.
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Abstract: In order to combine an ARQ system and an FEC system, an error correction code is inserted between an error detection code for a variable-length ARQ frame and a frame boundary flag pattern. Information to be transmitted is divided into blocks having a suitable length by a block divider in accordance with a line quality judged by-a line quality judger, and then subjected to a framing operation by an information frame preparer. The information subjected to the framing operation is attached with a CRC code by a CRC code generation/application circuit, subjected by a zero insertion circuit to an insertion of a suitable number of zero bits therein to provide a distinguished frame boundary with a flag, and then transmitted.
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Citations
Patent
Method and system for block arq with reselection of fec coding and/or modulation
Peter Schramm,Håkan Olofsson,Henrik Andreasson +2 more
- 25 Aug 1998
TL;DR: In this paper, the authors propose a modulation/coding scheme which is more resistant to noise and/or interference when connection quality drops below an acceptable threshold, when ARQ techniques use an alternative modulation or coding scheme.
149
Patent
Method and apparatus for adaptive control of forward error correction codes
Anil K. Agarwal,Dattakumar M. Chitre +1 more
- 15 Jul 1998
TL;DR: In this article, the adaptive control of a forward error correction code for transmission between a terrestrial cell/packet switch at a first terminal and a satellite/wireless network connecting to a second terminal is discussed.
98
Image transmission using arithmetic coding based continuous error detection
I. Kozintsev,J. Chou,K. Ramchandran +2 more
- 30 Mar 1998
TL;DR: This work proposes a new "continuous" error detection scheme using arithmetic coding that provides a novel tradeoff between the amount of added redundancy and the time needed to detect an error once it occurs.
74
Patent
Method and arrangement for the reliable transmission of packet data
Kalliojaervi Kari
- 08 Feb 2000
TL;DR: In this article, a method for reliably receiving digital information from a transmitting device is provided for reliably decoding digital information, where the information to be received is arranged in discrete subunits (200, 202, 203, 204, 301, 302, 303, 304) so that a predetermined number of subunits correspond to a superunit.
73
Patent
Variable rate coding for forward link
Jr. James A. Proctor
- 16 Nov 2000
TL;DR: In this paper, a forward error correction coding rate is adapted for individual channels while at the same time maintaining a fixed block size independent of the FEC coding rate, which allows the system data rate to adapt to the channel conditions experienced by a specific user.
65
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Patent
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Takehiro Yoshida
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Hashimoto Shinji
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TL;DR: In this article, a full-duplex data communication system is considered, where the signal-to-noise ratio, error rate and occurrences of out-of-sync condition of signals transmitted on the data channel of a first transmission medium from a first station to a second station are detected by the latter.
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Koichiro Maemura,Shigetaka Tanaka +1 more
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A hybrid ARQ scheme with adaptive forward error correction for satellite communications
TL;DR: A hybrid automatic-repeat-request system combined with adaptive forward error correction (ARQ/AFEC) which adaptively alters the error-correcting capability according to channel state using a nonsystematic Reed-Solomon code is presented.
54
ARQ protocols with adaptive block size perform better over a wide range of bit error rates
TL;DR: A very simple algorithm to implement an adaptive scheme to improve the throughput of conventional automatic-repeat-request protocols by dynamically adapting the protocol block length so that it approaches the optimum value for varying channel bit error rates.
51