Patent
Control flow integrity
Andrew F. Glew,Daniel A. Gerrity,Clarence T. Tegreene +2 more
- 19 Jul 2011
36
TL;DR: In this paper, a processor in accordance with the present disclosure is operable to enforce control flow integrity and respond to verification failure by at least one of a trap or an exception.
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Abstract: In at least some embodiments, a processor in accordance with the present disclosure is operable to enforce control flow integrity. For examiner, a processor may comprise logic operable to execute a control flow integrity instruction specified to verify changes in control flow and respond to verification failure by at least one of a trap or an exception.
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Citations
Patent
Hardware-enabled prevention of code reuse attacks
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- 21 May 2014
TL;DR: In this paper, a processor of the host system is endowed with two counters configured to store a count of branch instructions and a counting of inter-branch instructions, respectively, occurring within a stream of instructions fetched by the processor for execution.
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Patent
Protection Against Return Oriented Programming Attacks
Stephen A. Fischer
- 13 Mar 2013
TL;DR: In one embodiment, a processor includes at least one execution unit and a return pointer stored on a call stack based on a secret ROP value as discussed by the authors, which can only be accessed by the operating system.
28
Patent
Detection of return oriented programming attacks
Stephen A. Fischer,Kevin C. Gotze,Yuriy Bulygin,Kirk D. Brannock +3 more
- 13 Mar 2013
TL;DR: In one embodiment, a processor includes at least one execution unit and return oriented programming (ROP) detection logic as mentioned in this paper, which may determine a ROP metric based on a plurality of control transfer events.
23
Patent
Control Transfer Termination Instructions Of An Instruction Set Architecture (ISA)
Vedvyas Shanbhogue,Jason W. Brandt,Uday R. Savagaonkar,Ravi L. Sahita +3 more
- 30 Nov 2012
TL;DR: In this paper, a processor has an execution logic to execute instructions and a control transfer termination (CTT) logic coupled to the execution logic is used to cause a CTT fault to be raised if a target instruction of a control-transfer instruction is not a CTL instruction.
20
Patent
Attack Protection For Valid Gadget Control Transfers
Vedvyas Shanbhogue,Ravi L. Sahita,Yuriy Bulygin,Xiaoning Li,Jason W. Brandt +4 more
- 27 Aug 2015
TL;DR: In this paper, a checker logic is used to determine whether a value of a stack pointer is within a range between the first bound value and the second bound value, and a logic to prevent return to a caller of the function if the stack pointer value is not within the range.
19
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