Patent
Computer hardware executive
Dwight R. Wilcox
- 03 Jan 1983
34
TL;DR: The computer hardware executive as discussed by the authors is a special purpose associative processor that interfaces to the memory bus of a digital computer to provide high-speed execution of executive functions such as task registration, task synchronization, normal, time-dependent and time-critical event registration and triggering, hierarchical event-to-semaphore translation, and buffer allocation.
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Abstract: The computer hardware executive is a special purpose associative processorhich interfaces to the memory bus of a digital computer to provide high-speed execution of executive functions. These functions include task registration, task synchronization, normal, time-dependent and time-critical event registration and triggering, hierarchical event-to-semaphore translation, and buffer allocation. The programmer invokes an executive function by accessing the address in the hose computer address space dedicated to that function. The data written to or read from that address is the function operated or result, respectively. The hardware executive maintains task and event tables internally within its associative memory. The memory is organized such that the same field bit position of all table entries is accessed in parallel within a microinstruction cycle. Searches are performed by sequencing through the bit positions of interest. The computer hardware executive also contains an internal clock for comparison against time-dependent and time-critical event registrations. The executive function algorithms are executed by an internal microprogram.
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Citations
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53
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Patent
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Cotton John Michael
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TL;DR: In this paper, an associative processor is described, where an array of associative processing cells is configured to achieve variable length multiplication of numbers, such as binary two's complement numbers, under mask control.
30
Patent
Associative memory data processor
Peter Alan Edward Gardner,Michael Henry Hallett,Roger James Llewelyn,Peter J Titman +3 more
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TL;DR: In this article, three associative stores are interconnected to provide a data processor, where a control store contains a microprogram that selects a function table in a working store and data from a local store, the data being applied to the working store as a look-up argument.
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Patent
General purpose associative processor
John E. Shore,Frank A. Polkinghorn +1 more
- 20 Aug 1971
TL;DR: In this paper, a solid state associative chip memory system including an array of structurally identical elements each of which contains an integral number of bits is presented, independent of the length of each data word and the total number of words since any required word length may be obtained by horizontally connecting the proper number of associative chips and any processor size may be required by vertically connecting associative words.
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