Proceedings Article10.1109/IJCNN.2013.6706746
Cognitive computing systems: Algorithms and applications for networks of neurosynaptic cores
Steve K. Esser,Alexander Andreopoulos,Rathinakumar Appuswamy,Pallab Datta,Davis,Arnon Amir,John V. Arthur,Andrew S. Cassidy,Myron D. Flickner,Paul A. Merolla,Shyamal Suhana Chandra,Nicola Basilico,Stefano Carpin,Tom Zimmerman,Frank Zee,Rodrigo Alvarez-Icaza,Jeffrey A. Kusnitz,Theodore M. Wong,William P. Risk,Emmett McQuinn,Tapan K. Nayak,Raghavendra Singh,Dharmendra S. Modha +22 more
- 01 Aug 2013
- pp 1-10
171
TL;DR: A set of abstractions, algorithms, and applications that are natively efficient for TrueNorth, a non-von Neumann architecture inspired by the brain's function and efficiency, and seven applications that include speaker recognition, music composer recognition, digit recognition, sequence prediction, collision avoidance, optical flow, and eye detection are developed.
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Abstract: Marching along the DARPA SyNAPSE roadmap, IBM unveils a trilogy of innovations towards the TrueNorth cognitive computing system inspired by the brain's function and efficiency. The non-von Neumann nature of the TrueNorth architecture necessitates a novel approach to efficient system design. To this end, we have developed a set of abstractions, algorithms, and applications that are natively efficient for TrueNorth. First, we developed repeatedly-used abstractions that span neural codes (such as binary, rate, population, and time-to-spike), long-range connectivity, and short-range connectivity. Second, we implemented ten algorithms that include convolution networks, spectral content estimators, liquid state machines, restricted Boltzmann machines, hidden Markov models, looming detection, temporal pattern matching, and various classifiers. Third, we demonstrate seven applications that include speaker recognition, music composer recognition, digit recognition, sequence prediction, collision avoidance, optical flow, and eye detection. Our results showcase the parallelism, versatility, rich connectivity, spatio-temporality, and multi-modality of the TrueNorth architecture as well as compositionality of the corelet programming paradigm and the flexibility of the underlying neuron model.
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Citations
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
Filipp Akopyan,Jun Sawada,Andrew S. Cassidy,Rodrigo Alvarez-Icaza,John V. Arthur,Paul A. Merolla,Nabil Imam,Yutaka Nakamura,Pallab Datta,Gi-Joon Nam,Brian Taba,Michael P. Beakes,Bernard Brezzo,Jente B. Kuang,Rajit Manohar,William P. Risk,Bryan L. Jackson,Dharmendra S. Modha +17 more
TL;DR: This work developed TrueNorth, a 65 mW real-time neurosynaptic processor that implements a non-von Neumann, low-power, highly-parallel, scalable, and defect-tolerant architecture, and successfully demonstrated the use of TrueNorth-based systems in multiple applications, including visual object recognition.
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PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory
Ping Chi,Shuangchen Li,Cong Xu,Tao Zhang,Jishen Zhao,Yongpan Liu,Yu Wang,Yuan Xie +7 more
- 18 Jun 2016
TL;DR: This work proposes a novel PIM architecture, called PRIME, to accelerate NN applications in ReRAM based main memory, and distinguishes itself from prior work on NN acceleration, with significant performance improvement and energy saving.
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Convolutional networks for fast, energy-efficient neuromorphic computing
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TL;DR: This approach allows the algorithmic power of deep learning to be merged with the efficiency of neuromorphic processors, bringing the promise of embedded, intelligent, brain-inspired computing one step closer.
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Catherine D. Schuman,Thomas E. Potok,Robert M. Patton,J. Douglas Birdwell,Mark Edward Dean,Garrett S. Rose,James S. Plank +6 more
TL;DR: An exhaustive review of the research conducted in neuromorphic computing since the inception of the term is provided to motivate further work by illuminating gaps in the field where new research is needed.
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Minerva: enabling low-power, highly-accurate deep neural network accelerators
Brandon Reagen,Paul N. Whatmough,Robert Adolf,Saketh Rama,Hyunkwang Lee,Sae Kyu Lee,José Miguel Hernández-Lobato,Gu-Yeon Wei,David Brooks +8 more
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TL;DR: Minerva as mentioned in this paper proposes a co-design approach across the algorithm, architecture, and circuit levels to optimize DNN hardware accelerators, and shows that fine-grained, heterogeneous dataatype optimization reduces power by 1.5× and aggressive, inline predication and pruning of small activity values further reduces power.
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