Cache-aware scratchpad allocation algorithm
Manish Verma,Lars Wehmeyer,Peter Marwedel +2 more
- 16 Feb 2004
- Vol. 2, pp 21264
132
TL;DR: This work uses the scratchpad for storing instructions and proposes a generic cache aware scratchpad allocation (CASA) algorithm, which results in an average reduction of 8-29% in instruction memory energy consumption compared to a previously published technique for benchmarks from the mediabench suite.
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Abstract: In the context of portable embedded systems, reducing energy is one of the prime objectives. Most high-end embedded microprocessors include onchip instruction and data caches, along with a small energy efficient scratchpad. Previous approaches for utilizing scratchpad did not consider caches and hence fail for the au courant architecture. In the presented work, we use the scratchpad for storing instructions and propose a generic cache aware scratchpad allocation (CASA) algorithm. We report an average reduction of 8-29% in instruction memory energy consumption compared to a previously published technique for benchmarks from the mediabench suite. The scratchpad in the presented architecture is similar to a preloaded loop cache. Comparing the energy consumption of our approach against preloaded loop caches, we report average energy savings of 20-44%.
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Citations
•Book
Memory Systems: Cache, DRAM, Disk
Bruce Jacob,Spencer W. Ng,David T. Wang +2 more
- 10 Sep 2007
TL;DR: Is your memory hierarchy stopping your microprocessor from performing at the high level it should be?
813
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
Sumesh Udayakumaran,Rajeev Barua +1 more
- 30 Oct 2003
TL;DR: A dynamic allocation method for global and stack data that accounts for changing program requirements at runtime, has no software-caching tags, requires no run-time checks, has extremely low overheads, and yields 100% predictable memory access times is presented.
•Journal Article
Heap data allocation to scratch-pad memory in embedded systems
TL;DR: This thesis presents the first-ever compile-time method for allocating a portion of a program's dynamic data to scratch-pad memory that for the first time has no software-caching tags, requires no run-time per-access extra address translation, and is able to minimize the profile dependence issues which plague all similar allocation methods.
180
Dynamic overlay of scratchpad memory for energy minimization
Manish Verma,Lars Wehmeyer,Peter Marwedel +2 more
- 08 Sep 2004
TL;DR: This work demonstrates that the problem of dynamically overlaying scratchpad is an extension of the global register allocation problem and improves upon the only previously known allocation technique for statically allocating both variables and code segments onto the scratchpad.
155
Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison
Isabelle Puaut,Christophe Pais +1 more
- 16 Apr 2007
TL;DR: Experimental results show that the algorithm yields to good ratios of on-chip memory accesses on the worst-case execution path, with a tolerable reload overhead, for both types of on -chip memories.
References
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Computers and Intractability: A Guide to the Theory of NP-Completeness
Michael Randolph Garey,David S. Johnson +1 more
- 01 Jan 1979
TL;DR: The second edition of a quarterly column as discussed by the authors provides a continuing update to the list of problems (NP-complete and harder) presented by M. R. Garey and myself in our book "Computers and Intractability: A Guide to the Theory of NP-Completeness,” W. H. Freeman & Co., San Francisco, 1979.
CACTI: an enhanced cache access and cycle time model
TL;DR: In this paper, an analytical model for the access and cycle times of on-chip direct-mapped and set-associative caches is presented, where the inputs to the model are the cache size, block size, and associativity, as well as array organization and process parameters.
885
Scratchpad memory: a design alternative for cache on-chip memory in embedded systems
Rajeshwari M. Banakar,Stefan Steinke,Bo-Sik Lee,Mahesh Balakrishnan,Peter Marwedel +4 more
- 06 May 2002
TL;DR: The results clearly establish scratch pad memory as a low power alternative in most situations with an average energy reduction of 40% and the average area-time reduction for the scratchpad memory was 46% of the cache memory.