Patent
Bus data transfer system
Hashimoto Shigeru,Imai Tadaaki,Shibata Tomohito,Kazuo Shimomichi,Yamamoto Noboru +4 more
- 30 Nov 1977
7
TL;DR: In this article, the authors propose to enable either one of the synchronous and nonsynchronous data transfer between the channel device of the circuit control and the line adaptor by giving the function to transmit the service-in signal to the line adapator.
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Abstract: PURPOSE: To enable either one of the synchronous and nonsynchronous data transfer between the channel device of the circuit control and the line adaptor by giving the function to transmit the service-in signal to the line adapator. CONSTITUTION: In the case of the synchronous data transfer and the data writing, line adaptor 3-1 is selected by CPU. Thus, channel device 1 of the circuit control transmits address information ADR of adaptor 3-1, mode information MOD, parity bit ADMOP and control-out signal respectively. Adaptor 3-1 receives these ADRW CTLO and prepared for the data storage as well as sents back the service-in signal LSRVi. Receiving LSRVi, device 1 confirms that the information transmitted formerly has arrived at adaptor 3-1 without fail to turn off CTLO as well as to transmit DBO (8-bit output data and parity) plus line adaptor service-out signal LSRVO. COPYRIGHT: (C)1979,JPO&Japio
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Citations
Patent
System for peripheral identification obtained by calculation and manipulation data collecting for determining communication mode and collecting data from first terminal contacts
Koizumi Masahiro,Naoki Niizuma,Kawase Yasuhisa,Hamjime Ikebe +3 more
- 11 Oct 1995
TL;DR: A peripheral device for use with a data processing apparatus is defined in this paper, where the first pin is assigned for one of a power source and the ground potential, the second, third, seventh and eighth pins for transmitting data signals, and the fourth to sixth for transmitting control signals.
27
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Controller for rate of delivery for two liquid delivery lines
Teramoto Kon
- 18 May 1982
TL;DR: In this article, a titled casting device is adapted to two face metering and casting devices by delivering liquid to two secondary vessels by one primary vessel under mutually controlled flow rate, and delivering the liquid dividedly by each prescribed amt respectively different periods.
4
Patent
Data transferring system
Onodera Yutaka
- 03 Dec 1982
TL;DR: In this paper, the authors propose to improve the efficiency of data transfer by discriminating interlock transfer or split one with a requesting device according to the response of the opposite device at the time of requesting input in input transfer.
4
Patent
Bus controlling system
Shibata Tomohito,Hashimoto Shigeru,Kobayashi Masaaki +2 more
- 07 Jul 1982
TL;DR: In this article, the authors proposed a bus controlling part to prevent the malfunction of the system due to a function fault or the like of a channel device, by providing a circuit, which inhibits other devices from using a bus during the memory access time of a device to which a bus use permission signal is given, in a bus control part.
4
Patent
Data transfer control system
Imai Tadaaki,Kobayashi Masaaki,Kanzo Noda,Shibata Tomohito,Kazuo Shimomichi +4 more
- 31 Oct 1977
TL;DR: In this article, a memory access control part 22b detects a request for transfer of blocks by a DMA mode signal and switches the lower two bits of a receiver 23 to the side of an address counter 25.
1
References
Patent
Synch* clock control of microcomputer system
Morimoto Takao
- 01 Jun 1977
TL;DR: In this article, the I/O device is operated by a common clock synchronized with the system only when data or instructions are excahanged with the interior of the system, so that tproper speed can be obtained.
9
Patent
I*o interface control system
Kadowaki Yoshihiko
- 18 Jan 1977
TL;DR: By realizing a synchronous date transfer on an I/O interface, the restriction on the cable length in a high speed I /O shall be removed and the I/I interface control shall be made possible as usual as mentioned in this paper.
2
Patent
Input output controlling device
Noguchi Osamu,Mori Kazumasa,Yamaguchi Kenji,Dewa Hiroshi,Ukai Naotoshi +4 more
- 13 Sep 1977
TL;DR: In this paper, a controlling device to economize hard ware amount by enabling to control in common plural device controllers operating clock changing over the clock of an interface controller is presented, which is similar to our approach.
2
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