Block cipher algorithm-oriented reconfigurable S box, reconfigurable computing array and gate control method

TL;DR: In this article, a block cipher algorithm-oriented reconfigurable S box is presented, in which a gate control switch circuit is added to the S box and used for controlling an enable signal of S box to be in a valid or invalid state so as to control whether the box is subjected to table lookup operation or not.

Abstract: The invention discloses a block cipher algorithm-oriented reconfigurable S box. A gate control switch circuit is added to the S box and used for controlling an enable signal of the S box to be in a valid or invalid state so as to control whether the S box is subjected to table lookup operation or not. The invention furthermore discloses a reconfigurable computing array adopting the reconfigurable S box. The reconfigurable computing array comprises multiple computing resource blocks; each computing resource block comprises a group of S box resources and multiple groups of arithmetical logic resources; and the multiple groups of the arithmetical logic resources share the group of the S box resources. In addition, the invention discloses a gate control method for the reconfigurable S box. Multiple block cipher algorithms can be realized; the performance is high; the flexibility is high; the circuit realization area is small; the power consumption is low; and the S box can be subjected to fine-grained control.