Journal Article10.1109/TED.2003.820652
A surface potential-based compact model of n-MOSFET gate-tunneling current
60
TL;DR: In this article, a simplified version of the Esaki-Tsu formula is developed to calculate the tunneling current density, in which the original integral is approximated to retain the essential physics without sacrificing computational efficiency required in a compact model.
read more
Abstract: Aggressive scaling of the gate-oxide thickness has made gate-tunneling current an essential aspect of MOSFET modeling. This work presents a novel physics-based compact model of gate current in the n-MOSFET. A simplified version of the Esaki-Tsu formula is developed to calculate the tunneling current density, in which the original integral is approximated to retain the essential physics without sacrificing computational efficiency required in a compact model. The proposed model is surface potential-based in both the channel and source/drain overlap regions. The channel component of the gate current is physically partitioned into the source and drain parts using a symmetrically linearized version of the charge-sheet model. The partition is implemented in analytical form and accounts for the drain bias dependence of the channel component. A small number of adjustable parameters is sufficient to reproduce the experimentally observed bias and geometry dependence of the gate current for several advanced processes.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Compact modeling of Double-Gate MOSFETs
Huaxin Lu
- 01 Jan 2006
TL;DR: In this paper, the authors proposed a model of DG MOSFETs based on an analytical solution to the potential distribution at any point in the double-gate (DG) circuit.
Symmetric BSIM-SOI—Part I: A Compact Model for Dynamically Depleted SOI MOSFETs
Chetan Kumar Dabhi,Dinesh Rajasekharan,Girish Pahwa,Debashish Nandi,Naveen Karumuri,Sreenidhi Turuvekere,Anupam Dutta,Balaji Swaminathan,Srikanth Srihari,Yogesh Singh Chauhan,Sayeef Salahuddin,Chenming Hu +11 more
5
Quantum Mechanical Corrected Simulation Program with Integrated Circuit Emphasis Model for Simulation of Ultrathin Oxide Metal-Oxide-Semiconductor Field Effect Transistor Gate Tunneling Current
TL;DR: In this article, a quantum mechanical gate tunneling current model for simulating ultrathin oxide metal-oxide-semiconductor (MOS) devices is presented. And the gate leakage current on the drain current without any numerical convergence problem.
4
Advanced compact models: gateway to modern CMOS design
G. Gildenblat,C. McAndrew,H. Wang,W. Wu,D. Foty,Laurent Lemaitre,P. Bendix +6 more
- 13 Dec 2004
TL;DR: This work reviews the impact of the new modeling paradigm on MOSFET circuit simulation with particular attention to RF issues, non-quasi-static effects, and symmetric surface-potential-based models.
4
References
Tunneling in a finite superlattice
Raphael Tsu,Leo Esaki +1 more
TL;DR: In this article, the transport properties of a finite superlattice from the tunneling point of view have been computed for the case of a limited number of spatial periods or a relatively short electron mean free path.
2.4K
Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET's
TL;DR: In this article, an accurate determination of the physical oxide thickness is achieved by fitting experimentally measured capacitanceversus-voltage curves to quantum-mechanically simulated capacitance-versusvoltage results.
848
Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors☆
H.C. Pao,Chih-Tang Sah +1 more
TL;DR: In this article, the effects of the diffusion current on the three more important low-frequency dynamic characteristics (the short-circuit gate capacitance, the transconductance, and the drain conductance) are discussed.
618
A charge-sheet model of the MOSFET
TL;DR: In this paper, the authors compared the Pao-Sah double-integral model with the charge sheet model for long-channel MOSFETs and found that the charge-sheet model is simpler to extend to two or three dimensions.
598
Modeling CMOS tunneling currents through ultrathin gate oxide due to conduction- and valence-band electron and hole tunneling
Wen-Chin Lee,Chenming Hu +1 more
TL;DR: In this paper, a semi-empirical model is proposed to quantify the tunneling currents through ultrathin gate oxides (1-3.6 nm) as a multiplier to a simple analytical model, a correction function is introduced to achieve universal applicability to all different combinations of bias polarities (inversion and accumulation), gate materials (N/sup +/, P/sup+/, Si, SiGe) and tunneling processes.
367