Journal Article10.1002/SCJ.4690181008
A real-time image processing algorithm for visual inspection of semiconductor wafer patterns
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TL;DR: This paper proposes a method for detecting serious defects as a means to cope with the requirements of visual inspection of the semiconductor wafer.
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Abstract: The following general requirements are made in the visual inspection of the semiconductor wafer: (1) the candidates for the defect should automatically be detected from a complex multivalued pattern; and (2) only serious defects to the reliability of the element are extracted from those candidates. Such sophisticated decisions must be made with a high reliability and a high speed. This paper proposes a method for detecting serious defects as a means to cope with those requirements. The method is composed of the following two steps.
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Citations
Automated visual inspection for lsi water multilayer patterns by cascade pattern matching algorithm
Shunji Maeda,Hitoshi Kubota,Hiroshi Makihira,Takanori Ninomiya,Nonmember Yasuo Nakagawa,Nonmember Yuzo Taniguchi +5 more
TL;DR: The defect detection algorithm for the LSI wafer multilayer patterns was constructed and evaluated experimentally and it was verified that the whole chip area can be inspected, and the defect of 0.5 μm or more can be detected in a stable way.
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Precise Visual Inspection of LSI Wafer Patterns by Local Perturbation Pattern Matching Algorithm
TL;DR: A new defect detection algorithm that compares grayscale images of actual patterns and an automatic visual inspection system implementing this algorithm have been developed that has achieved a 100 percent detection rate for defects down to 0.3 μm in LSI photoresist patterns on a silicon wafer.
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An algorithm for determining shape descriptors based on video‐rate one‐pass image processing techniques
TL;DR: By the proposed method, an accurate and complete representation is obtained for any complex figure with intricate placements.
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Optimum threshold generation for automated visual inspection of large-scale integration wafer patterns
TL;DR: An edge-preserving grain-noise smoothing algorithm that generates a uniform threshold for each region surrounded by the pattern edges according to the grains detected using the multiple cell patterns to be inspected is proposed.
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References
A process for detecting defects in complicated patterns
TL;DR: A defect extraction device was developed that makes it possible to detect the defects in complicated patterns in a real-time mode and has promise in facilitating the automation of tedious visual inspection processes such as those for printed circuit boards.
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A Method for Automating the Visual Inspection of Printed Wiring Boards
TL;DR: The method employed in this study is based on characterizing 5 × 5 or 7 × 7 element binary patterns derived from the class of PWB's being inspected as good or defective, and the small number of patterns needed to represent virtually all of the normal border patterns suggests a two-stage inspection strategy.
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An automated mask inspection system—AMIS
TL;DR: In this article, the authors describe an automated mask inspection system (AMIS) used for inspection of step-and-repeat masks used in the fabrication of silicon integrated circuits, which is used to inspect both masters and copies for defects as small as 2 µm and is capable of measuring individual feature linewidths to less than M 1 µm.
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