Open AccessJournal Article
A Parallel Solver for Certain Toeplitz Tridiagonal Systems on Distributed-Memory Multicomputers
1
TL;DR: The analysis of complexity and numerical experiments show that the algorithm's speedup satisfy: S p(n)→p(n→+∞) .
read more
Abstract: The tridiagonal Toeplitz linear systems occur repeatedly in the solution of the implicit finite difference equations derived from linear first order hyperbolic equations, i.e. the Transport equation, under a variety of boundary conditions. Interest in fast direct methods for solving these kind of linear systems has long been a hot spot of research. A parallel algorithm for certain tridiagonal Toeplitz linear systems on distributed memory multicomputers is presented. Derivation of the algorithm is introduced. The algorithm is based on the factorization of the coefficient matrix and the principle of ‘divide and conquer’ in designing parallel algorithms. Authors make full use of the special structure of the coefficient matrix. By using the customary nesting procedure, Horner's formula, authors avoid the necessary of quantities α i, (-α) i(i=2,3,…,m ) and (α m) i, (-α m) i(i=2,3,…,p-1 ). This reduces the algorithm's redundancy computation caused by parallelization. The complexity of the algorithm is analyzed using Log P model. Its communication mechanism is very simple. The communication complexity is only related to p , the number of processors, and not related to n , the size of the matrix. The algorithm's parallel efficiency is high. The analysis of complexity and numerical experiments show that the algorithm's speedup satisfy: S p(n)→p(n→+∞) . This is the best a parallel algorithm can reach. The algorithm has been implemented on parallel computers. The results of numerical experiments about the algorithm on a distributed memory multicomputer are presented in this paper.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Research on FPGA based evolvable hardware chips for solving super-high dimensional equations group
Kangshun Li,Zhaolu Guo,Zhangxin Chen,Baoshan Ge +3 more
- 10 Aug 2009
TL;DR: Research on FPGA based evolvable hardware chips for solving the super-high dimensional equations group (SHDESC) is proposed and the experiments show that these chips can achieve high precision results in a short period of time to solve a super- highdimensional equations group.