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A Model for Analyzing Generalized Interprocessor Communication Systems
Janice E. Cuny,Lawrence Snyder +1 more
- 01 Oct 1982
TL;DR: A model of parallel computation which is parameterized by execution mode, allowing us to express different modes within a common framework, and enables us to make legitimate comparisons of execution modes is presented.
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Abstract: : We present a model of parallel computation which is parameterized by execution mode, allowing us to express different modes within a common framework The model enables us to make legitimate comparisons of execution modes We report here on some preliminary results (Author)
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Citations
Conversion from data-driven to synchronous execution in loop programs
TL;DR: Algorithms are presented that would enable programmers to write programs in a high-level, data flow language and then run those programs on a synchronous machine and show that all loop programs having the finite buffer property can be converted into synchronous mode.
9
Compilation of data-driven programs for synchronous execution
Janice E. Cuny,Lawrence Snyder +1 more
- 24 Jan 1983
TL;DR: Algorithms that convert a class of parallel programs, called loop programs, from data-driven mode to synchronous mode are presented to enable programmers to use a high-level, data- driven programming language without forfeiting the efficiency of a synchronous machine.
6
Testing the Coordination Predicate
TL;DR: An efficient algorithm to test coordination for parallel programs in which the code for each PE is a loop is reported on and it is shown that the general problem is PSPACE-hard.
References
Systolic Arrays for (VLSI).
Hsiang-Tsung Kung,Charles E. Leiserson +1 more
- 01 Dec 1978
TL;DR: A systolic system is a network of processors which rhythmically compute and pass data through the system, and almost all processors used in the networks are identical, so that a regular flow of data is kept up in the network.
978
Properties of a Model for Parallel Computations: Determinacy, Termination, Queueing
TL;DR: In this paper, the authors give a graph-theoretic model for the description and analysis of parallel computations, in which computation steps correspond to nodes of a graph and dependency between computation steps is represented by branches with which queues of data are associated.
449
Introduction to the configurable, highly parallel computer
TL;DR: To answer the role of polymorphism in parallel computation, the characteristics of parallel processing and the benefits and limitations of VLSI technology are reviewed.
Synchronization and computing capabilities of linear asynchronous structures
TL;DR: Persistence and determinacy are shown to be sufficient to guarantee that a synchronous execution policy can be relaxed to an asynchronous execution policy with no change to the result of the computation.
18
A difference in efficiency between synchronous and asynchronous systems
Eshrat Arjomandi,Michael J. Fischer,Nancy Lynch +2 more
- 11 May 1981
TL;DR: In this article, the authors define a distributed problem involving system behavior at n "ports" and show how to solve it in time s by a synchronous system but requires time at least (s-1) log n on any asynchronous system.
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