Journal Article10.1016/0165-6074(90)90160-B
A function oriented architecture for process control systems minimizing internal data transfer costs
Wolfgang A. Halang,Soon-Key Jung +1 more
1
TL;DR: A new and more powerful architecture of process control computers, which reflects the intrinsic parallelism of the applications and reduces the total costs by the minimisation of the transmission and cabling expenses is developed.
read more
About: This article is published in Microprocessing and Microprogramming. The article was published on 01 Mar 1990. The article focuses on the topics: Real-time Control System & Process (computing).
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Towards System level modeling and synthesis
Ahmed Amine Jerraya,Kevin O'Brien,Inhag Park,Bernard Courtois +3 more
- 04 Jan 1992
TL;DR: COSMOS is aimed to bridge the gap between the system level development tools and existing synthesis tools, and involves three steps, starting with a spcxifcation at the communicating system level.
4
References
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
C. L. Liu,James W. Layland +1 more
TL;DR: The problem of multiprogram scheduling on a single processor is studied from the viewpoint of the characteristics peculiar to the program functions that need guaranteed service and it is shown that an optimum fixed priority scheduler possesses an upper bound to processor utilization.
Computer and Information Technology in the Year 2000-Projection
Lundstrom,Larsen +1 more
TL;DR: The reasoning and conclusions drawn by a panel of experts from the National Research Council who, at the request of NASA, considered information and computer technologies which would be available in the year 2000 are reported.
11
A distributed logic program instruction prefetching scheme
TL;DR: An instruction issue system is described, developed for application in microcomputer design in order to minimize the data transmission expense between storage and cpu, and thus reducing hardware costs.
2