Journal Article10.1016/0165-6074(87)90252-3
A distributed logic program instruction prefetching scheme
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TL;DR: An instruction issue system is described, developed for application in microcomputer design in order to minimize the data transmission expense between storage and cpu, and thus reducing hardware costs.
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About: This article is published in Microprocessing and Microprogramming. The article was published on 01 Dec 1987. The article focuses on the topics: Instruction cycle & Instruction register.
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Citations
Patent
Memory-side driven anticipatory instruction transfer interface with processor-side instruction selection
Joseph D. Touch,David J. Farber +1 more
- 09 Jan 1992
TL;DR: In this paper, a code-pump is used to predict possible instruction streams that may be executed by the processor and passing instructions from all possible streams to the filter cache, where the code pump uses these addresses to determine which flow paths were followed and deallocate any entries in the data structure which correspond to paths that were not followed.
23
A function oriented architecture for process control systems minimizing internal data transfer costs
Wolfgang A. Halang,Soon-Key Jung +1 more
TL;DR: A new and more powerful architecture of process control computers, which reflects the intrinsic parallelism of the applications and reduces the total costs by the minimisation of the transmission and cabling expenses is developed.
1
References
An empirical study of FORTRAN programs
TL;DR: The principal conclusion which may be drawn is the importance of a program ‘profile’, namely a table of frequency counts which record how often each statement is performed in a typical run; there are strong indications that profile‐keeping should become a standard practice in all computer systems, for casual users as well as system programmers.
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Computer Structures: Principles and Examples
Daniel P. Siewiorek,Gordon Bell,Allen Newell +2 more
- 01 Aug 1983
TL;DR: In this article, the authors present an exploration of the design principles used in contemporary computer structures, including structural (PMS), performance (Kiviat graphs), and behavioral (ISP).
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