Proceedings Article10.1109/FPL.2013.6645609
A dataflow-inspired CGRA for streaming applications
Anja Niedermeier,Jan Kuper,Gerard J. M. Smit +2 more
- 02 Sep 2013
- pp 1-2
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TL;DR: Both the architecture and the programming language are inspired by the principles found in dataflow, consisting of an architecture and a programming language that contain a large degree of instruction-level parallelism.
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Abstract: The herein presented research is motivated by the need for reconfigurable, flexible computing arrays targeted at streaming applications that contain a large degree of instruction-level parallelism. Such arrays are usually referred to as coarse-grained reconfigurable arrays (CGRAs). CGRAs are composed of small, reconfigurable cores that are interconnected to form a computing grid. Here, we present a complete CGRA, consisting of an architecture and a programming language. Both the architecture and the programming language are inspired by the principles found in dataflow.
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Citations
A fine-grained parallel dataflow-inspired architecture for streaming applications
Anja Niedermeier
- 29 Aug 2014
TL;DR: This thesis presents a CGRA targeted at data driven streaming DSP applications that contain a large degree of fine grained parallelism, such as matrix manipulations or filter algorithms, and concludes that by using an architecture that is based on dataflow principles and a corresponding programming paradigm that can directly express dataflow graphs, DSP algorithms can be implemented in a very intuitive and straightforward manner.
ChordMap: Automated Mapping of Streaming Applications Onto CGRA
TL;DR: ChordMap as mentioned in this paper proposes an optimized spatio-temporal mapping with modulo-scheduling that judiciously employs concurrent execution of multiple kernels to improve parallelism and thereby maximize throughput.
2
A static-placement, dynamic-issue framework for CGRA loop accelerator
Zhongyuan Zhao,Weiguang Sheng,Weifeng He,Zhigang Mao,Zhaoshi Li +4 more
- 27 Mar 2017
TL;DR: A static-placement, dynamic-issue (SPDI) framework for the coarse-grained reconfigurable architecture (CGRA), which includes the compiler that statically places the operations and hardware design, a SPDI CGRA, that automatically schedule the operations.
References
Synchronous data flow
Edward A. Lee,David G. Messerschmitt +1 more
- 01 Sep 1987
TL;DR: A preliminary SDF software system for automatically generating assembly language code for DSP microcomputers is described, and two new efficiency techniques are introduced, static buffering and an extension to SDF to efficiently implement conditionals.
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Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing
Zain-ul-Abdin,Bertil Svensson +1 more
TL;DR: This survey explores the field of coarse-grained reconfigurable computing on the basis of the hardware aspects of granularity, reconfigurability, and interconnection networks, and identifies the emerging trends of introduction of asynchronous techniques at the architectural level and the use of nano-electronics from technological perspective.
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Dataflow-based reconfigurable architecture for streaming applications
Anja Niedermeier,Jan Kuper,Gerard J.M. Smit +2 more
- 10 Oct 2012
TL;DR: This paper presents an architecture composed of a configurable array of Computing cores and memory blocks in which both the execution mechanism and configuration principle of the computing cores and the behaviour of the memory blocks are based on streaming and dataflow principles.
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