Patent
A configurable neural network activation function implementation device
Che Deliang,Li Na +1 more
- 28 May 2019
2
TL;DR: In this article, a configurable neural network activation function implementation device is presented, which consists of a controller, a symbol judgment module, a range detection module, an address generator, a parameter register, a floating point multiplier and a phase operand arithmetic unit.
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Abstract: The invention discloses a configurable neural network activation function implementation device. The device comprises a controller, a symbol judgment module, a range detection module, a parameter register, a floating point multiplier, a floating point adder, a phase operand arithmetic unit, an address generator, a lookup table, a first gating latch and a second gating latch. The operation of a sigmoid function and a panh function is achieved by configuring a control signal M. The device is simple in achieving structure, the synchronous clock design is adopted, the time sequence checking and the verification are convenient, the area is small, the power consumption is low, the implementation on a chip is convenient, and the practicability of the embedded application is enhanced. When the device is used for calculating the neural network activation function, the processing flow is simple and easy to control, and the calculation efficiency of the neural network activation function is improved. The device can conveniently expand the address generator module and the lookup table module to meet the requirement of function precision conversion according to the requirement of tanh calculation precision. Therefore, the method is an ideal structure for realizing the embedded neural network processor activation function.
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Citations
Patent
In-memory computing circuit suitable for full-connection binary neural network
Shan Weiwei,Wang Tao +1 more
- 05 Nov 2019
TL;DR: In this article, an in-memory computing circuit suitable for a full-connection binary neural network is presented, which consists of an input latch circuit, a counting addressing module, an address selector, a decoding and word line driving circuit, storage array, precharging circuit, writing bit line drive circuit, copying bit line array unit, a sequential control circuit, sensitive amplifier, an NAND gate array, an output latch circuit and an analog delay chain.
2
Patent
Activation function calculation unit for quantized LSTM
Zheng Yong,Chen Zhujia,Shu Yi +2 more
- 21 Apr 2020
TL;DR: In this paper, the activation function calculation unit for quantized LSTM is characterized in terms of a sigmoid function and a tanh function, and the activation functions are used to approximate an activation function.
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He Yunpeng
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Patent
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