Proceedings Article10.1109/IEDM.2016.7838397
A 28nm HKMG super low power embedded NVM technology based on ferroelectric FETs
Martin Trentzsch,Stefan Flachowsky,Ralf Richter,Jan Paul,Berthold Reimer,Dirk Utess,S. Jansen,Halid Mulaosmanovic,Stefan Müller,Stefan Slesazeck,J. Ocker,M. Noack,Johannes Müller,P. Polakowski,J Schreiter,Sven Beyer,Thomas Mikolajick,B. Rice +17 more
- 01 Dec 2016
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TL;DR: The FeFET unique properties make it the best candidate for eNVM solutions in sub-2x technologies for low-cost IoT applications.
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Abstract: We successfully implemented a one-transistor (1T) ferroelectric field effect transistor (FeFET) eNVM into a 28nm gate-first super low power (28SLP) CMOS technology platform using two additional structural masks. The electrical baseline properties remain the same for the FeFET integration and the JTAG-controlled 64 kbit memory shows clearly separated states. High temperature retention up to 250 °C is demonstrated and endurance up to 105 cycles was achieved. The FeFET unique properties make it the best candidate for eNVM solutions in sub-2x technologies for low-cost IoT applications.
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Citations
Ferroelectric-Gate Field-Effect Transistor Memory With Recessed Channel
TL;DR: In this article, a novel ferroelectric-gate field effect transistor with recessed channel (R-FeFET) was proposed to improve memory window, program/erase speed, long-time retention, and endurance simultaneously.
Hybrid Stochastic Synapses Enabled by Scaled Ferroelectric Field-effect Transistors
TL;DR: The hardware-algorithm co-design analysis reveals the efficacy of the 2-tier memory in comparison to binary stochastic synapses in on-chip learning tasks – paving the way for algorithms exploiting multi-state devices with probabilistic transitions beyond deterministic ones.
Operation and Design of Ferroelectric FETs for a BEOL Compatible Device Implementation
Daniel Lizzit,David Esseni +1 more
TL;DR: This study investigates the operation and design of ferroelectric FETs for BEOL compatibility, highlighting the importance of charge trapping in ferroelectric-dielectric stacks and analyzing design options for polysilicon channel FeFETs, including channel thickness and doping concentration effects.
Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory
Juejian Wu,Yixin Xu,Bowen Xue,Yu Wang,Yongpan Liu,Huazhong Yang,Xueqing Li +6 more
- 01 Jan 2020
TL;DR: This work investigates and optimizes the read and write approaches to MLC FeFET NVM design and shows significant latency and energy improvement, and the number of sensible levels of states per cell is increased with an enhanced dynamic sensing range and an enhanced sensing margin.
Gate Stack Optimization Toward Disturb-Free Operation of Ferroelectric HSO based FeFET for NAND Applications
Konrad Seidel,Kati Biedermann,J. Van Houdt,Tarek Ali,R. Hoffmann,Kati Kühnel,Malte Czernohorsky,Matthias Rudolph,B. Patzold,P. Steinke,K. Zimmermann +10 more
- 01 Oct 2019
TL;DR: The impact of pass voltage on the disturb properties of a standard 10 nm Si-doped hafnium oxide (HSO) based FeFETs in a twin gate NAND string is reported, showing a rather low margin between the pass voltage and strong disturb of pass cells and suggests FeFet stack optimization.
References
Ferroelectricity in hafnium oxide thin films
TL;DR: In this paper, it was shown that crystalline phases with ferroelectric behavior can be formed in thin thin films of SiO2 doped hafnium oxide, which is suitable for field effect transistors and capacitors due to its excellent compatibility to silicon technology.
2.3K
Low-Leakage-Current DRAM-Like Memory Using a One-Transistor Ferroelectric MOSFET With a Hf-Based Gate Dielectric
Chun-Hu Cheng,Albert Chin +1 more
TL;DR: In this article, a 1T FeMOS-based one-transistor ferroelectric-MOSFET was used to display DRAM functions of a 5 ns switching time, 1012 on/off endurance cycles, and 30 times on-off retention windows at 5 s and 85 °C.
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Correlation between the macroscopic ferroelectric material properties of Si:HfO2 and the statistics of 28 nm FeFET memory arrays
S. Mueller,Stefan Slesazeck,S. Henker,Stefan Flachowsky,P. Polakowski,J. Paul,Elliot John Smith,J. Muller,Thomas Mikolajick +8 more
TL;DR: In this article, the thickness dependent ferroelectric properties of Si:HfO2 with the memory characteristics of small (56-bit) FeFET arrays were correlated for the first time.
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