Proceedings Article10.1109/IEDM.2016.7838397
A 28nm HKMG super low power embedded NVM technology based on ferroelectric FETs
Martin Trentzsch,Stefan Flachowsky,Ralf Richter,Jan Paul,Berthold Reimer,Dirk Utess,S. Jansen,Halid Mulaosmanovic,Stefan Müller,Stefan Slesazeck,J. Ocker,M. Noack,Johannes Müller,P. Polakowski,J Schreiter,Sven Beyer,Thomas Mikolajick,B. Rice +17 more
- 01 Dec 2016
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TL;DR: The FeFET unique properties make it the best candidate for eNVM solutions in sub-2x technologies for low-cost IoT applications.
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Abstract: We successfully implemented a one-transistor (1T) ferroelectric field effect transistor (FeFET) eNVM into a 28nm gate-first super low power (28SLP) CMOS technology platform using two additional structural masks. The electrical baseline properties remain the same for the FeFET integration and the JTAG-controlled 64 kbit memory shows clearly separated states. High temperature retention up to 250 °C is demonstrated and endurance up to 105 cycles was achieved. The FeFET unique properties make it the best candidate for eNVM solutions in sub-2x technologies for low-cost IoT applications.
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Citations
Cross-layer Design for Computing-in-Memory: From Devices, Circuits, to Architectures and Applications
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- 18 Jan 2021
TL;DR: The FeFET is used as a representative device and the challenges, opportunities and contributions for the emerging trends of cross-layer co-design for computing-in-memory (CiM) are discussed.
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Roadmap for Ferroelectric Memory: Challenges and Opportunities for IMC Applications
29 Aug 2022
TL;DR: In this paper , the challenges and opportunities of using hafnium oxide-based ferroelectric memory for in-memory computing applications are discussed, and the roadmap for them is drawn.
3
Investigation on Variability of Ferroelectric-Gate Field-Effect Transistor Memory by Random Spatial Distribution of Interface Trap
TL;DR: In this paper , the variability of memory window (MW) in ferroelectric-gate field effect transistor (FeFET) was investigated by considering the spatial distribution of the trap density at the FE/IL interface.
2
Investigating Dynamic Minor Loop of Ferroelectric Capacitor
Panni Wang,Zheng Wang,Nujhat Tasneem,Jar Hur,Asif Islam Khan,Shimeng Yu +5 more
- 01 Oct 2019
TL;DR: Results show that the polarity change increases by increasing the pulse amplitude and pulse width, which could achieve multi-states of FeFET channel conductance.
2
Reliability Assesement of Ferroelectric nvCAP for Small-Signal Capacitive Read-Out
Omkar Phadke,Halid Mulaosmanovic,Stefan Dunkel,Sven Beyer,Shimeng Yu +4 more
- 14 Apr 2024
TL;DR: The reliability aspects of small-signal nvCAP mode in FeFET devices are evaluated. Endurance, retention, and MLC are assessed. The device exhibits up to 107 program-erase cycles and can be recovered by C-V sweep.
2
References
Ferroelectricity in hafnium oxide thin films
TL;DR: In this paper, it was shown that crystalline phases with ferroelectric behavior can be formed in thin thin films of SiO2 doped hafnium oxide, which is suitable for field effect transistors and capacitors due to its excellent compatibility to silicon technology.
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Low-Leakage-Current DRAM-Like Memory Using a One-Transistor Ferroelectric MOSFET With a Hf-Based Gate Dielectric
Chun-Hu Cheng,Albert Chin +1 more
TL;DR: In this article, a 1T FeMOS-based one-transistor ferroelectric-MOSFET was used to display DRAM functions of a 5 ns switching time, 1012 on/off endurance cycles, and 30 times on-off retention windows at 5 s and 85 °C.
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Correlation between the macroscopic ferroelectric material properties of Si:HfO2 and the statistics of 28 nm FeFET memory arrays
S. Mueller,Stefan Slesazeck,S. Henker,Stefan Flachowsky,P. Polakowski,J. Paul,Elliot John Smith,J. Muller,Thomas Mikolajick +8 more
TL;DR: In this article, the thickness dependent ferroelectric properties of Si:HfO2 with the memory characteristics of small (56-bit) FeFET arrays were correlated for the first time.
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