TL;DR: The key result of the paper is to demonstrate that simple approximate models provide a lower bound on the system performance in the case studied.

TL;DR: The diagnosability and availability of fault-tolerant multimicroprocessor systems are investigated based on a model of self-supervising systems which periodically perform selftests, diagnoses and repair.

TL;DR: A rigorous methadology is described, within the analytical approach to tune the architecture of a dynamically microprogrammable computer to a given application in order to minimize its execution time.

TL;DR: Detailed measurements and the analysis of the runtimes for the microprogrammed operations as compared to optimized higher level language code show the different contributions of vertical migration and associativity to the total speedup obtained.

TL;DR: Based on a general model for a monitor the special attributes of firmware monitors are discussed along with their objectives and the techniques used, followed by a review of the relevant literature on firmware monitoring.

TL;DR: An experiment is performed that takes an existing software design methodology and assesses its impact on the complexity problems faced in migration, and a ‘new’ opportunity for performance improvement in performing vertical migrations is identified.

TL;DR: The general design philosophy and properties of firmware monitors are discussed and the specific implementation of the page fault monitor is described.

TL;DR: Large arrays of complete microcomputers promise cost effective means to treat extensive numerical problems and high reliability can be achieved very economically, without additional redundancy.

TL;DR: LOGE-MIR determines the optimal sequence of condition tests, an optimal I O-port configuration and a storage allocation minimizing the number of jump instructions, which result in an intermediate language program, which can easily be interpreted on the target microcomputer.

TL;DR: A high degree of flexibility is obtained by means of a highly hierarchical structure of software and an easy-to-modify table-driven driven system description and particular care has been devoted to user-simulator interface via a proper command language.

TL;DR: A distributed system based on a local network is presented as a skeleton for a class of dedicated machines useful for the design of safety-oriented and/or mentally-oriented applications in order to simplify real-time applications design.

TL;DR: Field of activity, error treatment efficiency and speed problems of language interpreters, followed by remarks on hardware support for interpretation and compilation on microcomputers are dealt with.

TL;DR: The results show that FREM works well for firmware engineering and that it could be a valuable tool as the firmware development activities increase.

TL;DR: Methods of decentralized priority control of multiple access to shared line bus in multimicroprocessor systems are described and application of these methods was demonstrated to improve performances ofmultiple access in interfaces MULTIBUS and S-100.

TL;DR: Guidelines for the design of an on line operating system are developed for the particular case of an electrical energy dispatch computer.

TL;DR: A large class of problems may be solved by small, dedicated systems composed of several independent microcomputers connected in a simple way, without sophisticated interconnection networks.

TL;DR: When considering the problems of microprogramming multiprocessor systems they can be traced back to the cause of difficulty of microcoding, which is the usually considerable greater number of components.

TL;DR: A decentralised computing system based on the data-flow model of computation is applied, in conjunction with a laser range-finder, to the task of recognising a number of simple objects in a work-space.

TL;DR: The hardware and software design for a low cost Chinese character CRT terminal based on a time-division multiplexed refresh memory, a LSI CRT controller and the ubiquitous microprocessor is described.

TL;DR: The conclusion is a performance gain of a factor of about 8 caused by matching the structures and a loss in programmer's convenience without numerical quantification.

TL;DR: Performing complex computations on data coming from fast acquisition processes can be achieved by means of a μP based architecture, which employs the bit-slice ALU with its own microcontroller.

TL;DR: A molecular multimicroprocessor architecture is described which seems particularly apt to large plant automation and control systems based on local computing modules connected by super busses to form multiprocessor of systems which may in turn be loosely linked into more complex structures.

TL;DR: The main tool is the register transfer language REGTRAL, which is emphasized to be easily adaptable and extensible and various high-level extensions are proposed.

TL;DR: The circular synchronous bus is introduced as a way of transferring information in a computing system and the interconnection protocol for the modules coupled to the bus is detailed as well as technological aspects of the interfaces.