TL;DR: In this article, a test structure with an evaporated aluminum metallization pattern on the surface of a phosphorus “doped” oxide layer of a silicon semiconductor chip was studied.
TL;DR: In this paper, the Laplace transform of the time-to-system-failure distribution and the mean-time-to system failure were derived for a two-unit parallel redundant system with general failure allowed.
TL;DR: A microwave oven is disclosed as a typical appliance controlled by a microprocessor device that has an LED digital display, a number of indicator LED's, and a capacitive touch keyboard, along with circuits for controlling a magnetron, a broiler unit, andA blower.
TL;DR: In this paper, the estimation of the parameters of 2-parameter, 3-parameters, mixed and composite Weibull distributions is described and exemplified using probability plotting.
TL;DR: In this article, an intermittently used system when failure of a unit is detected only during a usage period is considered and the following quantities concerning the disappointment time are derived: (i) the distribution of the first disappointment time; (ii) the expected number of occurences of disappointment; (iii) the pointwise unavailability.
TL;DR: In this article, the authors consider two-terminal parallel-series networks formed from m identical and independent components and find that for any value of q, the proportion of failures which are "failures to idle" is maximized.
TL;DR: Emmphasis is given to some analysis techniques oriented to fault-tree representation and cut set approximation in Reliability analysis of a complex system.
TL;DR: In this paper, the prediction of vibration fatigue life of leads and solder joints at low excitation from that obtained during high-level testing is possible but the extrapolation exponent depends not only on the S-N curve of the failed material, but also on the type of excitation and on whether failure is due to component or to support resonance.
TL;DR: In this paper, temperature gradient measurements and X-ray topography are used to characterize silicon wafers before and after batch processing and successful processing of large area silicon slabs (115 × 57 mm area and 0·375 mm thick) is discussed.
TL;DR: In this paper, a method and device for the detection of mask defects, referring to the masks used for semiconductor production, is presented, where the examined mask image is approximated to the set of M × N points by means of the set converters, according to the degree of lightness of the corresponding sector of the image.
TL;DR: In this article, a three-state system with one normal and two failure modes (i.e., open and short or complete and catastrophic failure modes) is presented and a Markov model is developed to obtain the state probabilities and the availability function when repairs follow a generalized distribution.
TL;DR: In this article, a mathematical Markov model is developed to obtain the partial availability function of a four-state system with normal, partial, complete and catastrophic failure modes, and the model is used to describe the failure modes.
TL;DR: Two possibilities of employing multi-valued logic circuits for testing of binary networks are considered, the first augments binary synchronous sequential machines through the addition of permutation inputs withmulti-valued outputs and the second embeds binary combinational networks into easily testable ternary ones.
TL;DR: In this paper, various techniques of adjusting thin and thick-film resistors in hybrid microelectronic circuits are briefly described and their relative merits and shortcomings pointed out, as well as their relative strengths and weaknesses.
TL;DR: Algorithms for reliability modeling of multistate large repairable systems consisting of several units, each contributing a finite amount to the total system capacity are proposed.
TL;DR: A Markov model containing n identical units of which one is functioning and (n −1) are stand-bys is presented, and the state probability equations are developed to obtain system operational availability.
TL;DR: There has been an increasing interest in producing dielectrically isolated integrated circuits over the past five years for both bipolar and MOS as discussed by the authors, which stems from the potential of such a technique to increase the operational speed of the circuit, particularly CMOS by reduction of the stray capacitance and a need to reduce the susceptibility of monolithic circuits to photocurrents generated by radiation in space and military environments.
TL;DR: The models are based on the concepts of tie sets; they are fairly simple and can be used for any values of m and k and are suitable for adoption for a computer code.
TL;DR: In this paper, the authors summarized the component failure rates observed in a large population of computer systems, focusing on integrated circuits, discrete semiconductor devices, resistors, capacitors and joints.
TL;DR: In this paper, an electroless method for depositing conductive layers on insulating materials can be used in producing hybrid integrated circuits (HIC's), as alternatives to the evaporation and sputter deposition techniques.
TL;DR: Simple analytical techniques by which the reliability of small systems can be assessed, with and without error correction, and the effect of the constituent subsystems can be investigated without detailed numerical computation are presented.
TL;DR: Field Programmable Logic Arrays, when viewed as Associative memories, exhibit Selective, Concurrent and Multiple addressing modes that enable compressing a set of logic functions to the minimum required states, at substantial savings in hardware.
TL;DR: In this article, the newly developed state probabilities equations of an extended four-state system model were presented, and a short short paper was presented, in which the authors presented the new state probabilities equation of the extended four state system model.
TL;DR: A practical method is suggested for selecting the components, available in different grades, of a subsystem where its cost is minimized for the required reliability and performance.
TL;DR: Several examples of applications of the method under discussion to the process of semiconductor production are given, which may prove helpful in the elaboration of new technologies and types of integrated circuits.
TL;DR: The computerized event tree analysis is presented as a tool for engineering evaluation of system availability and how computer calculations are organized and how basic data are obtained.
TL;DR: In this paper, the contributions of coefficient of thermal expansion and thermal conductivity of a plastic semiconductor package to thermal shock testing reliability were discussed, and these contributions were determined by use of the isothermal mode of thermomechanical analysis.