TL;DR: In this paper, a comprehensive review on development and future trends in zinc oxide thin film transistors (ZnO TFTs) is presented, which highlights the need of high-k dielectrics for low leakage and low threshold voltage in ZnOTFTs.
Abstract: Purpose
The purpose of this paper is to present a comprehensive review on development and future trends in zinc oxide thin film transistors (ZnO TFTs). This paper presents the development of TFT technology starting from amorphous silicon, poly-Si to ZnO TFTs. This paper also discusses about transport and device modeling of ZnO TFT and provides a comparative analysis with other TFTs on the basis of performance parameters.
Design/methodology/approach
It highlights the need of high–k dielectrics for low leakage and low threshold voltage in ZnO TFTs. This paper also explains the effect of grain boundaries, trap densities and threshold voltage shift on the performance of ZnO TFT. Moreover, it also addresses the challenges like requirement of stable p-type ZnO semiconductor for various electronic applications and high value of ZnO mobility to meet growing demand of high-definition light emitting diode TV (HD-LED TV).
Findings
This review will motivate the readers to further investigate the conduction mechanism, best alternate for gate-dielectric and the deposition technique optimization for the enhancement of the performance of ZnO TFTs.
Originality/value
This is a literature review. The technological evolution of TFT in general and ZnO TFT in particular is presented in this paper.
TL;DR: The main value of this approach is to first test the effect of each material property on the package dynamic characteristics before starting the correlation process, then to automate the correlation algorithm using the built-in FE model updating feature available in ANSYS software.
Abstract: One difficultly in building an effective finite element (FE) model of a board-level package is because of complex structure of the printed circuit board (PCB), as it contains copper layers, woven fabrics, plated-through holes and so forth. Therefore, it is often acceptable to obtain equivalent orthotropic material properties and use them in the simulation. This paper aims to provide a research methodology to produce equivalent FE models for board-level electronic packages.,In this methodology, the FE models’ data were correlated with experimental modal analysis results in terms of natural frequencies and mode shapes. Statistical factorial analysis was used to examine the electronic assembly material properties effect on the structure’s resonant frequencies. The equivalent material properties of the PCB were adjusted using the optimization tool available in ANSYS software for free boundary conditions. The equivalent FE model was then validated for the fixed boundary conditions.,The resultant FE models were in great match with the measured data in terms of resonant frequencies and mode shapes. The so-developed models can be further used in the analysis of the dynamic response of the electronic packages and solder interconnects.,The current approach provides a sophisticated research methodology to provide high-accuracy FE models of electronic assemblies subjected to vibration. The main value of this approach is to first test the effect of each material property on the package dynamic characteristics before starting the correlation process, then to automate the correlation algorithm using the built-in FE model updating feature available in ANSYS software.
TL;DR: In this article, the authors analyzed the possibilities of mechanical switch replacement by capacitive film touch sensor in applications requiring high reliability and short response time, and found the touch capacitive sensors that allow shorter switching times compared to standard mechanical switches.
Abstract: Purpose
The purpose of this paper is to analyse the possibilities of mechanical switch replacement by capacitive film touch sensor in applications requiring high reliability and short response time. Advantage of replacing mechanical switch by capacitive touch sensor is no mechanical wear and possible implementation of sensor in application where the switch could not be used or where the flexibility of the sensor substrate is required. The aim of this work is to develop a capacitive touch sensor with the advantage of maximum mechanical resistance, short response time and high sensitivity.
Design/methodology/approach
Based on various possible sensors layouts, the authors realized 18 different (14 self-capacitance and four mutual capacitance) topologies of capacitive sensor for touch applications. Three different technologies – PCB, LTCC and polymer technology – were used to characterize sensor’s behaviour. For precise characterization of different layouts realized on various substrates, the authors used integrated circuit FDC2214 capacitance-to-digital converter.
Findings
Sensing range of the capacitive touch (proximity) sensor is affected by the per cent of area covered by the sensor, and it does not depend on topology of sensor. The highest sensing range offers PCB technology. Flexible substrates can be used as proper substituent to rigid PCB.
Originality/value
The novelty of this work lies in finding the touch capacitive sensors that allow shorter switching times compared to standard mechanical switches.
TL;DR: In this article, a low-temperature co-fired ceramic (LTCC) module with isolation between primary and secondary windings at the level between 6 and 12 kV was examined.
Abstract: The purpose of this study was to design, fabricate and test devices based on transformers integrated with low-temperature co-fired ceramic (LTCC) modules with isolation between primary and secondary windings at the level between 6 and 12 kV.,Insulating properties of the LTCC were examined. Dielectric strength and volume resistivity were determined for common LTCC tapes: 951 (DuPont), 41020, 41060 (ESL), A6M (Ferro) and SK47 (KEKO). According to the determined properties, three different devices were designed, fabricated and tested: a compact DC/DC converter, a galvanic separator for serial digital bus and a transformer for high-voltage generator.,Breakdown field intensity higher than 40 kV/mm was obtained for the test samples set, whereas the best breakdown field intensity of about 90 kV/mm was obtained for 951 tape. The materials 41020 and 951 exhibited the highest volume resistivity. Fabricated devices exhibited safe operation up to a potential difference of 10 kV, limited by minimum clearance. Long-term stability was assured by over 20 kV strength of inner dielectric.,This paper contains description of three devices made in the LTCC technology for application in systems with high-voltage isolation requirement, for example, for power or railway power networks.,The results show that LTCC is a suitable material for fabrication of high-voltage devices with integrated passives. Technology and properties of three examples of such devices are described, demonstrating the ability of the LTCC technology for application in reliable high-voltage devices and systems.
TL;DR: In this paper, a high-k buffer layer was used between the ferroelectric layer and the silicon substrate to improve the performance of 1T-type random access memory (FeRAM).
Abstract: Purpose
Development of (1T-type) ferroelectric random access memory (FeRAM) has most actively progressed since 1995 and motivated by the physical limits and technological drawbacks of the flash memory. 1T-type FeRAM implements ferroelectric layer at the field effect transistor (FET) gate. During the course of the investigation, it was very difficult to form a thermodynamically stable ferroelectric-semiconductor interface at the FET gate, leading to the introduction of one insulating buffer layer between the ferroelectric and the silicon substrate to overcome this problem. In this study, Al2O3 a high-k buffer layer deposited by plasma enhanced atomic layer deposition (PEALD) is sandwiched between the ferroelectric layer and silicon substrate.
Design/methodology/approach
Ferroelectric/high-k gate stack were fabricated on the silicon substrate and pt electrode. Structural characteristics of the ferroelectric (PZT) and high-k (Al2O3) thin film deposited by RF sputtering and PEALD, respectively, were optimized and investigated for different process parameters. Metal/PZT/Metal, Metal/PZT/Silicon, Metal/PZT/Al2O3/Silicon structures were fabricated and electrically characterized to obtain the memory window, leakage current, hysteresis, PUND, endurance and breakdown characteristics.
Findings
XRD pattern shows the ferroelectric perovskite thin Pb[Zr0.35Ti0.65]O3 film with (101) tetragonal orientation deposited by sputtering and PEALD Al2O3 with (312) orientation showing amorphous nature. Multiple angle analysis shows that the refractive index of PZT varies from 2.248 to 2.569, and PEALD Al2O3 varies from 1.6560 to 1.6957 with post-deposition annealing temperature. Increase in memory window from 2.3 to 8.4 V for the Metal-Ferroelectric-Silicon (MFS) and Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure has been observed at the annealing temperature of 500°C. MFIS structure with 10 nm buffer layer shows excellent endurance of 3 × 109 read-write cycles and the breakdown voltage of 33 V.
Originality/value
This paper shows the feature, principle and improvement in the electrical properties of the fabricated gate stack for 1T-type nonvolatile FeFET. The insulating buffer layer sandwiched between ferroelectric and silicon substrate acts as a barrier to ferroelectric–silicon interdiffusion improves the leakage current, memory window, endurance and breakdown voltage. This is perhaps the first time that the combination of sputtered PZT on the PEALD Al2O3 layer is being reported.
TL;DR: In this paper, the authors verified the possibility of applying alumina (Al2O3) as the passivation and antireflective coating in silicon solar cells, and the electrical parameters of the solar cells fabricated with four different thicknesses of the Al 2O3 layer were determined on the basis of the currentvoltage (I-V) characteristics.
Abstract: Purpose
The purpose of this study is to verify the possibility of applying alumina (Al2O3) as the passivation and antireflective coating in silicon solar cells.
Design/methodology/approach
Model of a studied structure contains the following layers: Al2O3/n+/n-type Si/p+/Al2O3. Optical parameters of the aluminium oxide films on silicon wafers were measured in the range of wavelengths from 250 to 1,400 nm with a spectrophotometer Perkin Elmer Lambda 900. The minority carrier lifetime at the start of the n-type Si base material and after each of the next technological process was analysed by a quasi-steady-state photoconductance technique. The electrical parameters of the solar cells fabricated with four different thickness of the Al2O3 layer were determined on the basis of the current-voltage (I-V) characteristics. The silicon solar cells of 25 cm2 area and 300 µm thickness were investigated.
Findings
The optimum thickness of alumina as passivation layer is 90 nm. However, considering also antireflective properties of the first layer of a photovoltaic cell, the best structure is silicon with alumina passivation layer of 30 nm thickness and with TiO2 antireflective coatings of 60 nm thickness. Such solution has allowed to produce the cells with the fill factor of 0.77 and open circuit voltage of 618 mV.
Originality/value
Measurements confirmed the possibility of applying the Al2O3 as a passivation and antireflective coating (obtained by atomic layer deposition method) for improving the efficiency of solar cells.
TL;DR: In this article, a low temperature co-fired ceramic (LTCC)-based microfluidic module with integrated microwave components is investigated, and the performance of such an LTCC-based module is investigated.
Abstract: Purpose
This paper aims to focus on the application of low temperature co-fired ceramic (LTCC) technology in the fabrication of a microfluidic module with integrated microwave components. The design, technology and performance of such an LTCC-based module is investigated. The rapid heating of liquid samples on a microliter scale is shown to be possible with the use of microwaves.
Design/methodology/approach
The developed microwave-microfluidic module was fabricated using well-known LTCC technology. The finite element method was used to design the geometry of the microwave circuit. Various numerical simulations for different liquids were performed. Finally, the performance of the real LTCC-based microwave-microfluidic module was examined experimentally.
Findings
LTCC materials and technology can be used in the fabrication of microfluidic modules which use microwaves in the heating of the liquid sample. LTCC technology permits the fabrication of matching circuits with appropriate geometry, whereas microwave power can be used to heat up the liquid samples on a microliter scale.
Research limitations/implications
The main limitation of the presented work is found to be in conjunction with LTCC technology. The dimensions and shape of the deposited conductors (e.g. microstrip line, matching circuit) depend on the screen-printing process. A line with resolution lower than 75 µm with well-defined edges is difficult to obtain. This can have an effect on the high-frequency properties of the LTCC modules.
Practical implications
The presented LTCC-based microfluidic module with integrated microwave circuits provides an opportunity for the further development of various micro-total analysis systems or lab-on-chips in which the rapid heating of liquid samples in low volumes is needed (e.g. miniature real-time polymerase chain reaction thermocycler).
Originality/value
Examples of the application of LTCC technology in the fabrication of microwave circuits and microfluidic systems can be found in the available literature. However, the LTCC-based module which combines microwave and microfluidic components has yet to have been reported. The preliminary work on the design, fabrication and properties of the LTCC microfluidic module with integrated microwave components is presented in this paper.
TL;DR: In this article, the authors presented eddy current sensing coils for the turbo charger speed measurement, which were manufactured with the low temperature co-fired ceramic (LTCC) technology.
Abstract: Purpose
The purpose of this paper is to analyze a presentation of eddy current sensing coils for the turbo charger speed measurement, which were manufactured with the low temperature co-fired ceramic (LTCC) technology. The goal is to be able to manufacture small robust coils with complex geometries and improved signal output.
Design/methodology/approach
A crucial element for its performance is the quality factor of the embedded coil. Thanks to the use of the developed LTCC manufacturing processes, the lateral wounding distance of the printed coils can be reduced to 30 µm, and simultaneously, the aspect ratio should be enlarged compared to standard LTCC technologies. By the use of a novel printed double-D coil design, the overall sensor characteristics will be improved.
Findings
The metallization thickness can be simultaneously enhanced that results in the internal resistance being reduced. Thus, the inductivity and the ohmic resistance achieve an obvious optimization that results in significant improvement of the quality factor of the novel coils when compared to standard technologies. Embedded micro coils have a sintered metallization aspect ratio of more than one and thus an optimal performance differing clearly from prior art. Their reliability was proven through temperature cycle tests of over more than 1,300 h.
Research limitations/implications
The developed LTCC coil technology will be introduced in the JAQUET sensor portfolio of TE Connectivity for the measurement of turbocharger speed on both passenger cars and trucks. The measurement and control of turbochargers speed enables the optimal regulation of airflow into the engine thereby improving the fuel economy and leading to a reduction of engine emissions.
Originality/value
This paper shows fabrication and performance of the original manufactured LTCC coil for turbocharger speed sensors and its optimized signal output by the novel design.
TL;DR: In this article, an al-doped ZnO (AZO) top cathode with high transparency has been deposited by an atomic layer deposition (ALD) method at 140°C for 1 h. The products were studied by UV-vis spectrometer and atomic force microscopy (AFM).
Abstract: The purpose of this paper is to find an effective route to fabricate high transparent top electrode in quantum dots light-emitting diodes (QLEDs).,Al-doped ZnO (AZO) top cathode with high transparency have been deposited by an atomic layer deposition (ALD) method at 140°C for 1 h. The products are studied by UV-vis spectrometer and atomic force microscopy (AFM). The electroluminescence spectra of QLED are recorded using an Ocean Optics high-resolution spectrometer (HR4000). The devices were measured under ambient conditions without encapsulation.,The AZO-based QLED shows excellent performance with high luminance and current efficiency.,The AZO obtained by ALD method is a promising cathode candidate for application in QLEDs.
TL;DR: In this paper, the synthesis of α-Co(OH)2, its structural, elemental and morphological properties and its supercapacitor properties are investigated by using cyclic voltammetry, charging-discharging graph, stability test and electrochemical impedance spectroscopy (EIS).
Abstract: Purpose
The overall purpose of this research paper largely depends on developing an easy method to synthesis a material suitable for supercapacitor application. This paper includes the synthesis of, α-Co(OH)2, its structural, elemental and morphological properties and its supercapacitor properties.
Design/methodology/approach
Firstly, the electrolyte is prepared using binder free method, then electrodeposition is used to synthesize α-Co(OH)2 at 2 V. X-ray diffraction (XRD), energy dispersive spectroscopy (EDS) and scanning electron microscope (SEM) are used to study the structural, elemental and morphological characteristics. The supercapacitor properties are investigated by using cyclic voltammetry, charging-discharging graph, stability test and electrochemical impedance spectroscopy (EIS).
Findings
Synthesis of α-Co(OH)2 is a tedious job as the temperature and use of weak base plays an important role. However, throughout electrodeposition, temperature is maintained using a water bath and weak base as the precursor. The presence of nitrate anions shows more interlayer space than that of s-Co(OH)2 because of which free diffusion of the electrolyte is possible. Sheets structures are more visible in SEM images. Nanosheet like structure is observed in the film and such kind of structure provide higher surface area and higher specific capacitance. Usually, the surface morphology of cobalt hydroxide shows flower-like, spherical and nanocubes particles. The cross-section of the deposited film and it is found to be approximately 100 µm. In the forward and backward scan, oxidation and reduction peaks are clearly visible. However, such a behavior is reported as stable because of no further peaks of oxidation.
Originality/value
XRD and EDS confirms the growth of α-Co(OH)2. SEM images shows the porous nature of the film. Specific capacitance and energy density has been estimated at 5 mV s−1 is 780 F g−1 and 82 W h kg−1, respectively. The film was stable for 600 cycles showing 75 per cent capacitance retention. The voltage drop is 0.02 V for 0.5 A cm−2, indicating low resistance and good conductivity of the film. The specific power is estimated to be 15 W kg−1 for 1 A cm−2. The value of RESR, RCT, CDL and W is 4.83 Ohm, 1.273 Ohm, 0.00233 C and 0.717, respectively. Thus indicating α-Co(OH)2 to be better candidate for supercapacitor applications.
TL;DR: In this paper, the design and performance of X-band high power 3-bit phase shifter which has been fabricated in 0.25µm GaN HEMT technology are presented.
Abstract: Purpose
The design and performance of X-band high power 3-bit phase shifter which has been fabricated in 0.25µm GaN HEMT technology are presented.
Design/methodology/approach
Each bit of this phase shifter design is based on high-pass/low-pass topology.
Findings
For all eight states, the insertion loss is 12.5 ± 2.5 dB from 8-10 GHz and the input return loss is better than 9 dB over 8-10 GHz. The 3-bit phase shifter achieves a RMS phase error of 1o at 8.5 GHz and a RMS amplitude error less than 1.1dB. The measured continuous wave power data demonstrates typical input RF power handing capability of 32 dBm at 8 GHz.
Originality/value
This is to the authors’ knowledge the first published results of 3-bit AlGaN/GaN phase shifter.
TL;DR: In this article, a method of preparing spray-on dopant solutions that enable obtaining a p+ region forming a back-surface field (BSF) during the diffusion doping process was developed.
Abstract: Purpose
The purpose of this paper is to develop a method of preparing spray-on dopant solutions that enable obtaining a p+ region forming a back-surface field (BSF) during the diffusion doping process. The spray-on method used allows to decrease the costs of dopant solution application, which is particularly significant for new low-cost production processes.
Design/methodology/approach
This paper presents steps of production of high concentration boron dopant solutions enabling diffusion doping of crystalline p-type silicon surfaces. To check the fabricated dopant solutions for stability and suitability for spray-on application, their viscosity and density were measured in week-long intervals. The dopant solutions described in this paper were used in a series of diffusion doping processes to confirm their suitability for BSF production.
Findings
A method of preparing dopant solutions with parameters enabling depositing them on silicon wafers by the spray-on method has been established. Due to hygroscopic properties of the researched dopant solutions, a maximum surrounding atmosphere humidity has been established. The solutions should not be applied by the spray-on method, if this humidity value is exceeded. The conducted derivatographic examination enabled establishing optimal drying conditions.
Originality/value
The paper presents a new composition of a dopant solution which contains high concentration of boron and may be applied by the spray-on method. Derivatographic examination results, as well as equations describing the relation between dopant solution density and viscosity and storage time are also original for this research. The established dependencies between the sheet resistance of the fabricated BSF and the diffusion doping time are other new elements described in the paper.
TL;DR: The proposed current sensor in DC-DC converter provides an accurately sensed inductor current with a significant reduction in power consumption in the range of 0.2 mW and high-accuracy regulation is obtained.
Abstract: Purpose
This paper aims to propose a low-power complementary MOS (CMOS) current sensor for control circuit in an integrated DC-DC buck converter.
Design/methodology/approach
The integrated DC-DC converter, which is composed of feedback control circuit and power block, is designed with 0.35-µm CMOS process. Current sensor in the control circuit is integrated with sense-FET and voltage-follower circuits to reduce power consumption and improve its sensing accuracy. In the current-sensing circuit, the size ratio of the power metal oxide semiconductor field effect transistor (MOSFET) to the sensing transistor (K) is 1,000, and a current-mirror is used for a voltage follower. N-channel MOS acts as a switching device in the current-sensing circuit, where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time.
Findings
Experiment shows that the current sensor is operated with accuracy of more than 85 per cent, and the transient time of the error amplifier is controlled within 100 µs. The sensing current is in the range of a few hundred µA at a frequency of 0.6-2 MHz and an input voltage of 3-5 V. The output voltage is obtained as expected with the ripple ratio within 5 per cent.
Originality/value
The proposed current sensor in DC-DC converter provides an accurately sensed inductor current with a significant reduction in power consumption in the range of 0.2 mW. High-accuracy regulation is obtained using the proposed current sensor. As the sensor utilizes simple switch-type voltage follower and sense-FET, it can be widely applied to other low-power applications such as high-frequency oscillator and over-current protection circuit.
TL;DR: In this paper, the effect of post-deposition rapid thermal annealing (PDA) and post-metallization anneeling (PMA) on the structural and electrical characteristics of Pd/Al2O3/6H-SiC capacitors was investigated.
Abstract: Purpose
Al2O3 used as gate dielectric enables exploitation of higher electric field capacity of SiC, improving capacitive coupling and memory retention in flash memories. Passivation of traps at interface and in bulk which causes serious threat is necessary for better performance. The purpose of this paper is to investigate the effect of post-deposition rapid thermal annealing (PDA) and post-metallization annealing (PMA) on the structural and electrical characteristics of Pd/Al2O3/6H-SiC capacitors.
Design/methodology/approach
Al2O3 film is deposited by ALD; PDA is performed by rapid thermal annealing (RTA) in N2 at 900°C for 1 min and PMA in forming gas for 10 and 40 min. X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS) measurements data are studied in addition to capacitance-voltage (C-V) and current-voltage (I-V) characteristics for the fabricated Pd/Al2O3/SiC capacitors. Conduction mechanism contributing to the gate leakage current is extracted for the entire range of gate electric field.
Findings
RTA forms aluminum silicide at the interface causing an increase in the density of the interface states and gate leakage current for devices with an annealed film, when compared with an as-deposited film. One order improvement in leakage current has been observed for the devices with RTA, after subjecting to PMA for 40 min, compared with those devices for which PMA was carried out for 10 min. Whereas, no improvement in leakage current has been observed for the devices on as-deposited film, even after subjecting to PMA for 40 min. Conduction mechanisms contributing to gate leakage current are extracted for the investigated Al2O3/SiC capacitors and are found to be trapfilled limit process at low-field regions; trapassisted tunneling in the mid-field regions and Fowler–Nordheim (FN) tunneling are dominating in high-field regions.
Originality/value
The effect of PDA and PMA on the structural and electrical characteristics of Pd/Al2O3/SiC capacitors suitable for flash memory applications is investigated in this paper.
TL;DR: In this article, the influence of input current and ambient temperature on thermal resistance of InGaAlP low-power SMD LED is reported, and the experimental results were validated using computational fluid dynamics (CFD) software.
Abstract: Purpose Thermal behavior of LED device under different operating conditions must be known to enhance its reliability and efficiency in various applications. The influence of input current and ambient temperature on thermal resistance of InGaAlP low-power SMD LED is reported in this study. Design/methodology/approach Thermal parameters of the LED were measured using thermal transient measurement via Thermal Transient Tester (T3ster). The experimental results were validated using computational fluid dynamics (CFD) software. Findings As input current increases from 50 to 90 mA at 25 ℃, the relative increase in LED package 〖(∆R〗_thJS) and total thermal resistance (〖∆R〗_thJA) is about 10% and 4%, respectively. In addition, at 50 mA and ambient temperature from 25 to 65 ℃, the 〖∆R〗_thJS and 〖∆R〗_thJA is roughly 28% and 22%, respectively. A good agreement between simulation and experiment results of junction temperature. Originality/value Most of previous studies have focused on thermal management of high-power ...
TL;DR: In this paper, the hydrodynamic resistance of channels and diode effect of passive valves was investigated in low-temperature co-fired ceramic (LTCC) structures with integrated microfluidic elements.
Abstract: The purpose of this study is to design, fabricate and investigate low-temperature co-fired ceramic (LTCC) structures with integrated microfluidic elements. Special attention is paid to the study of fluid properties of micro-channels and microvalves, which are important constitutive parts of both, microfluidic systems and individual microfluidic devices.,Several test patterns of fluid channels with different geometry and different types of valves were designed and realized in LTCC technology. All test structures were tested under the flow of two fluids (liquids): water and isopropyl alcohol. Flow rates at different applied pressure were measured and hydrodynamic resistance and diode effect were calculated.,The investigation of the channels showed that viscosity of fluidic media has significant influence on the hydrodynamic resistance in channels with rectangular cross-section, while this effect is small on channels with square cross-section. The viscosity also has a decisive influence on the diode effect of different shape of valves, and therefore, it is important in the selection of the valve in practical applications.,In this work, the investigation of hydrodynamic resistance of channels and diode effect of passive valves is limited on selected geometry and only on two fluidic media and two applied pressures. All these and some other parameters have a significant influence on fluidic properties, but this will be the topic of the next research work, which will be supported by numerical modelling.,The presented results are useful in the future designing process of LTCC-based microfluidic devices and systems.,Microfluidic in the LTCC structures is an unconventional use of this technology. Therefore, the fluid properties are relatively unsearched. On the other hand, the global use of microfluidic devices and systems is growing rapidly in various applications. They are mostly made by polymer materials, however, in more demanding applications; ceramic is a useful alternative.
TL;DR: In this article, the authors examined the mechanisms behind the formation and migration of silver-based molten zones in bulk germanium and on its surface and concluded that inclusions move through the mechanism of melting and crystallization.
Abstract: Purpose
This study aims to examine the electromigration processes resulting from thermal overloads of semiconductor devices. While in operation, parts of such devices can heat up to 330°C for a short period, resulting in the emergence of molten zones and the devices’ inevitable degradation. Therefore, this study examines the mechanisms behind the formation and migration of silver-based molten zones in bulk germanium and on its surface.
Design/methodology/approach
Experimental data concerning the correlation between the migration velocities of the inclusions and their sizes are obtained.
Findings
By comparing these experimental data with known electromigration models, it is concluded that inclusions move through the mechanism of melting and crystallization. The dynamics of Ge–Ag zones in the volume of a germanium crystal are compared to those on its surface and accelerated electromigration on the surface of the crystal is observed. This increased migration velocity is shown to be associated with additional contributions of the electrocapillary component.
Originality/value
The results of this study can be used to calculate the operating modes of semiconductor power devices under intense heat loading.
TL;DR: In this article, a wideband ring Voltage Controlled Oscillator (RVCO) based on programmable current topology is proposed, which is suitable to be implemented in cost-effective and wideband frequency synthesizer.
Abstract: Purpose This work is a wideband ring Voltage Controlled Oscillator (RVCO) based on programmable current topology. It occupies a very tiny area yet achieving a good phase noise performance, which is suitable to be implemented in cost-effective and wideband frequency synthesizer. Design/methodology/approach The tuning range and gain are improved by dividing the VCO tuning curve into multiple curves controlled by programmable current sources without introducing additional parasitic capacitance. Findings Fabricated in 130nm standard CMOS technology and occupying an area of 0.079mm2, the VCO is tunable from 2.05-to -4.19 GHz, with a tuning percentage of 68.5%. The VCO measures a phase noise performance of -96.7dBc/Hz at an offset of 1 MHz from a 4.19 GHz carrier while consuming an average current of 6.5 mA, achieving a FoM and FOMT of -158.9 dBc/Hz and -175.6 dBc/Hz respectively. Originality/value The proposed design employs programmable current topology without introducing parasitic capacitance, hence achievi...
TL;DR: In this paper, a test pattern consisting of three straight lines was printed with two different silver pastes on a flexible magnetic sheet and a polyethylene naphthalate (PEN) foil for comparison.
Abstract: Purpose The aim of this paper is to present thermal and mechanical durability of conductive tracks screen printed with silver polymer pastes on flexible magnetic sheets. Design/methodology/approach A test pattern consisted of three straight lines was printed with two different silver pastes on a flexible magnetic sheet and a polyethylene naphthalate (PEN) foil for comparison. Electrical properties of these lines were examined by resistance measurements and their thickness was measured with a digital microscope on cross sections. Cycling bending was performed to investigate mechanical properties of prepared samples as well as thermal shocks to analyse their thermal durability. Further, samples after thermal shocks were undergone cycling bending to test influence of thermal exposure on mechanical properties of the prepared samples. Changes in the test lines after the thermal and mechanical tests were assessed by resistance measurements and microscopic analysis of surface and internal structure of the test l...
TL;DR: In this article, the authors determine the key process factors which affect the adhesion strength of encapsulation molding compounds (EMCs) to leadframes to obtain reliable components without any need to pretreat the leadframe surface.
Abstract: Purpose
The purpose of this paper is to determine the key process factors which affect the adhesion strength of encapsulation molding compounds (EMCs) to leadframes to obtain reliable components without any need to pretreat the leadframe surface.
Design/methodology/approach
EMCs were molded to Cu leadframes to experimentally quantify the effect of mold temperature, resin viscosity, leadframe oxidation and powder moisture on the adhesion force. Component reliability was assessed by PCT.
Findings
A higher mold temperature result in a larger adhesion force. The mold temperature of 175°C provides the largest process window. Leadframe oxidation can increase adhesion first, but then decrease it drastically with further oxidation. The powder moisture content has mixed effect on adhesion.
Practical implications
By molding at 175°C, limiting the wire bonding time and minimizing the powder moisture content, reliable components can be obtained without any need for leadframe surface pretreatment such as plasma cleaning or surface coating.
Originality/value
Quantify the key process factors which affect the adhesion of EMCs and reveal reason behind the current industrial practice of using the mold temperature of 175°C.
TL;DR: In this article, the Hill-Coleman method was used to calculate the interface states density in each case and it was found that most of the defects have energies within the upper band gap of the semiconductor.
Abstract: Purpose
The purpose of this paper is to investigate and classify the defects on silicon-based power devices under extreme conditions.
Design/methodology/approach
Electrical characterization was performed on MOS devices to study their interface defects. The devices were subjected to a voltage or a current constraint to induce defects, and then measurements were done to detect the effects of those defects. Measurements include current voltage, capacitance and conductance characterization. The Hill–Coleman method was used to calculate the interface states density in each case.
Findings
It was found that most of the defects have energies within the upper band gap of the semiconductor.
Originality value
The method used in this paper allows the determination of any interface defects on a Si/SiO2 structure.
TL;DR: In this paper, the results of combining fine line structuring with laser microvias and to compare laser drilling in thick-films with different established via forming technologies are presented.
Abstract: Purpose
The purpose of the paper is to show up the current possibilities by combination of classic thick-film technology with advanced processing. Thick-film hybrid ceramic substrates have been a base for highly reliable devices for space, aerospace, medical and industrial applications since many years. The combination of classic thick-film printing with advanced technologies for fine line structuring provides substrates best suited for packaging solutions with challenging requirements, such as temperature stability and extended product lifetime. Combined with state of the art assembly technologies, thick-film substrates are used in highly demanding industries.
Design/methodology/approach
In recent years, several technologies for fine line structuring have been introduced, e.g. fine line printing, photo imaging, etching, laser structuring for local chip fan-out or fine line structuring on single layers. For further miniaturization of thick-film multilayers circuits, after solving the fine line resolution, the reduction of electrical connection of conductive layers through printed insulation/dielectric layer (via) diameters to connect the layers should be addressed.
Findings
The focus of this paper is to show the results of combining fine line structuring with laser microvias and to compare laser drilling in thick-films with different established via forming technologies.
Originality/value
The reduction of via size to 60 µm – smaller than 50% compared to using state-of-the-art printing technologies enables a solution for significant relaxation of current design possibilities.
TL;DR: In this paper, a simple and cheap temperature transducer with frequency output with high measurement resolution in low temperature co-fired ceramic (LTCC) technology by using the distributed Resistance-Capacitance (RC) networks in high-pass filter configuration is presented.
Abstract: Purpose
The purpose of this study is to design a simple and cheap temperature transducer with frequency output with high measurement resolution in low temperature co-fired ceramic (LTCC) technology by using the distributed Resistance-Capacitance (RC) networks in high-pass filter configuration.
Design/methodology/approach
This paper presents the concept of elaboration of a transducer of temperature into frequency, its implementation in LTCC technology and test results. Construction and technological works are supported by a series of computer simulations of the process of indirect adjustment of the whole system.
Findings
The investigation results of the proposed and developed system have confirmed the correctness of the adopted concept, and the practical usefulness of an applied original method of indirect adjusting of the transducer.
Practical implications
The study contains practical and useful information about the principles of designing and manufacturing of the converters of the different physical quantities into frequency by using the elements with distributed parameters made in LTCC technology which was presented on the example of a temperature transducer.
Originality/value
The study presents the original solution of a simple transducer with the use of RC structures with distributed parameters made in LTCC technology and the idea of indirect adjustment of the elements to a desired value.
TL;DR: In this paper, a practical design methodology of high power wideband power amplifier was proposed and verified using a single section matching network, achieving a maximum output power of 10 Watt from 100MHz to 2GHz.
Abstract: Purpose To propose a practical design methodology of high power wideband power amplifier. Design/methodology/approach Distributed power amplification method is employed to a Gallium Nitride (GaN) device to achieve wideband operation. In order to achieve the high power without trading off the bandwidth and gain, a methodology to extract the package loading effect is proposed and verified Findings A maximum output power of 10 Watt is achieved from 100MHz to 2GHz with wideband power gain of 32dB in measurement. This performance is achieved through a single section matching network. Research limitations/implications Research limitations: measurement accuracy is dependable to the thermal behaviour of the high power device. Practical implications The proposed technique is an excellent solution to be employed in the two way radio power amplifier that minimizes the fundamental trade-off issue between power, gain, bandwidth and efficiency. Originality/value In this work, a practical DPA design methodology is propo...
TL;DR: Good characteristics of the obtained light, as well as the possibility of compensating for changes in colour temperature of natural light and reducing the impact of aging of LEDs, in the authors’ opinion, make the proposed solution find its place on the market.
Abstract: Purpose
The purpose of this paper is to present issues related to the design of a modern lighting system based on LED technology. The developed system provides lighting with a high colour rendering index (up to 98); it also has many innovative functions, which make its implementation bring significant energy savings and increase the comfort of work.
Design/methodology/approach
In contrast to typical solutions, the dynamic synthesis of white light from six component colours was used in the presented project. This process is controlled by a microcontroller, and there is a colour temperature sensor in the feedback loop. The communication between smart luminaires and sensor modules is provided by means of a ZigBee wireless network.
Findings
The correctness of the proposed methodology has been proved by measurements and laboratory tests.
Research limitations/implications
The process of improving the lighting system is continued and significant changes in the spectrum of used sensors are expected.
Practical implications
The proposed system based on mixing light from six components is an innovative solution that besides undoubted advantages entails a more elaborate electronic circuitry. However, good characteristics of the obtained light, as well as the possibility of compensating for changes in colour temperature of natural light and reducing the impact of aging of LEDs, in the authors’ opinion, make the proposed solution find its place on the market.
Originality/value
The proposed solution is original, both in terms of the light mixing technique and advanced functionality offered by the system.
TL;DR: In this paper, a light-trapping structure based on Ag nanograting for amorphous silicon (a-Si) thin-film solar cells was designed and the optimization results show that the absorption of the solar cell with Ag nanopillar structure and anti-reflection film is enhanced up to 29.5 per cent under AM1.5 illumination in the 300-to 800-nm wavelength range compared with the reference cell.
Abstract: Purpose
The purpose of this paper is to investigate a light-trapping structure based on Ag nanograting for amorphous silicon (a-Si) thin-film solar cell. Silver nanopillar arrays on indium tin oxide layer of the a-Si thin-film solar cells were designed.
Design/methodology/approach
The effects of the geometrical parameters such as nanopillar radius (R) and array period (P) were investigated by using the finite element simulation.
Findings
The optimization results show that the absorption of the solar cell with Ag nanopillar structure and anti-reflection film is enhanced up to 29.5 per cent under AM1.5 illumination in the 300- to 800-nm wavelength range compared with the reference cell. Furthermore, physical mechanisms of absorption enhancement at different wavelength range are discussed according to the electrical field amplitude distributions in the solar cells.
Research limitations/implications
The research is still in progress. Further studies mainly focus on the performance of solar cells with different nanograting materials.
Practical implications
This study provides a feasible method for light-trapping structure based on Ag nanograting for a-Si thin-film solar cell.
Originality/value
This study is promising for the design of a-Si thin-film solar cells with enhanced performance.
TL;DR: In this paper, the influence of the Cu-Al2O3 films coated Cu substrate as thermal interface material on the thermal and optical behavior of the LEDs package and the annealing effect has not significant impact on the changes of properties of the films.
Abstract: Purpose The paper aims to study the influence of the Cu-Al2O3 films coated Cu substrate as thermal interface material on the thermal and optical behaviour of the LEDs package and the annealing effect on the thermal and optical properties of the films. Design/methodology/approach Layer stacking technique is used to deposit the Cu-Al2O3 films through magnetron sputtering and annealing process were conducted on the synthesized films. Findings In this paper, it is found that un-annealed Cu-Al2O3 coated Cu substrate exhibited low value of thermal resistance compared to the bare Cu substrate and previous work. Also the annealing effect does not have significant impact on the changes of properties of the films. Research limitations/implications It is deduced that the increase of Cu layer thickness can further improved the thermal properties of the deposited film, which can reduced the thermal resistance of the package in system level analysis. Practical implications The paper suggested that the Cu-Al2O3 coated C...
TL;DR: A novel 3D system-in-package (SiP) approach based on stacked silicon submount and 3D SiP technology that meets the optical requirements of general lighting applications and is implemented into the miniaturization of particular matter sensors and gas sensor detection system.
Abstract: The purpose of this paper is to demonstrate a novel 3D system-in-package (SiP) approach. This new packaging approach is based on stacked silicon submount technology. As demonstrators, a smart lighting module and a sensor systems were successfully developed by using the fabrication and assembly process described in this paper.,The stacked module consists of multiple layers of silicon submounts which can be designed and fabricated in parallel. The 3D stacking design offers higher silicon efficiency and miniaturized package form factor. This platform consists of silicon submount design and fabrication, module packaging, system assembling and testing and analyzing.,In this paper, a smart light emitting diode system and sensor system will be described based on stacked silicon submount and 3D SiP technology. The integrated smart lighting module meets the optical requirements of general lighting applications. The developed SiP design is also implemented into the miniaturization of particular matter sensors and gas sensor detection system.,SiP has great potential of integrating multiple components into a single compact package, which has potential implementation in intelligent applications.
TL;DR: In this paper, the authors describe the fabrication and characterization of current mirror-integrated microelectromechanical systems (MEMS)-based pressure sensor, which consists of three identical 100-µm long and 500-m wide n-channel MOSFETs connected in a resistive loaded current mirror configuration.
Abstract: Purpose
This paper aims to describe the fabrication and characterization of current mirror-integrated microelectromechanical systems (MEMS)-based pressure sensor.
Design/methodology/approach
The integrated pressure-sensing structure consists of three identical 100-µm long and 500-µm wide n-channel MOSFETs connected in a resistive loaded current mirror configuration. The input transistor of the mirror acts as a constant current source MOSFET and the output transistors are the stress sensing MOSFETs embedded near the fixed edge and at the center of a square silicon diaphragm to sense tensile and compressive stresses, respectively, developed under applied pressure. The current mirror circuit was fabricated using standard polysilicon gate complementary metal oxide semiconductor (CMOS) technology on the front side of the silicon wafer and the flexible pressure sensing square silicon diaphragm, with a length of 1,050 µm and width of 88 µm, was formed by bulk micromachining process using tetramethylammonium hydroxide solution on the backside of the wafer. The pressure is monitored by the acquisition of drain voltages of the pressure sensing MOSFETs placed near the fixed edge and at the center of the diaphragm.
Findings
The current mirror-integrated pressure sensor was successfully fabricated and tested using in-house developed pressure measurement system. The pressure sensitivity of the tested sensor was found to be approximately 0.3 mV/psi (or 44.6 mV/MPa) for pressure range of 0 to 100 psi. In addition, the pressure sensor was also simulated using Intellisuite MEMS Software and simulated pressure sensitivity of the sensor was found to be approximately 53.6 mV/MPa. The simulated and measured pressure sensitivities of the pressure sensor are in close agreement.
Originality/value
The work reported in this paper validates the use of MOSFETs connected in current mirror configuration for the measurement of tensile and compressive stresses developed in a silicon diaphragm under applied pressure. This current mirror readout circuitry integrated with MEMS pressure-sensing structure is new and fully compatible to standard CMOS processes and has a promising application in the development CMOS-MEMS-integrated smart sensors.
TL;DR: In this article, the optoelectronic properties of the multi-channel ZnO UV photodetectors were investigated by dielectrophoresis for different AC voltages.
Abstract: Purpose The purpose of this paper is to investigate the optoelectronic properties of the multi-channel ZnO UV photodetectors. Design/methodology/approach ZnO nanowires were assembled by dielectrophoresis for the UV photodetectors. Different ZnO channels were adjusted by different AC voltages and investigated for UV optoelectronic properties. Findings The number of the ZnO channels is increasing with the enhancing AC voltage. Optimum performance of the UV photodetectors is obtained with more channels. Originality/value Dielectrophoresis is a promising method for controllable assembly of multi-channel ZnO photodetectors. ZnO photodetectors with more channels demonstrate a good response to 380nm UV light, which show great potential application in UV photodetector.