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  2. Journals
  3. Electronics & Packaging
  4. 2013
Showing papers in "Electronics & Packaging in 2013"
Journal Article•
A Review on Wire Bonding Process in Electronic Manufacturing

[...]

Chen Quan1•
Freescale Semiconductor1
01 Jan 2013-Electronics & Packaging
TL;DR: In this paper, a comprehensive review on wire bonding procedure, bonding motions, key bonding parameters, properties of bonding materials, designs of bonding tools as well as joining mechanism is presented. But, the review is limited to the key process factors.
Abstract: This paper attempted to integrate both reviewing on recent literatures and actual experiences in wire bonding process and provide a comprehensive review on bonding procedure,bonder motions,key bonding parameters,properties of bonding materials,designs of bonding tools as well as joining mechanism.At the same time some issues such as EFO-open,golf bond,short tail,non-stick on pad and lead were analysed;the solutions and recent developments to these issues were discussed.In addition,the application and special points of copper wire in wire bonding were also focused on.Because of the limitation of paper page,only key process factors were reviewed briefly;while this paper provided an opportunity to understand wire bonding well and brought a great benefit to the solving of whether actual operation issues or basic bonding principles.

2 citations

Journal Article•
Research on Coplanar Waveguide True-time Delay Line Thin Film Hybrid Circuit

[...]

Liu Longhu1•
China Electronics Technology Group Corporation (China)1
01 Jan 2013-Electronics & Packaging
TL;DR: In this article, a coplanar waveguide true-time delay line was fabricated by thin film hybrid circuit's process, which has several advantages such as small volume, light weight, low insert loss, and high anti-interference.
Abstract: The coplanar waveguide true-time delay line, which is fabricated by thin film hybrid circuit's process, has several advantages such as small volume, light weight, low insert loss, and high anti-interference It also can integrate with other microwave circuits conveniently, and the precision of true-time delay is exactly Certainly, the fabrication of thin film hybrid circuit with high precision pattern and denseness vias process is more difficult Through optimize the fabrication process, an X-band 2 bits true-time delay line thin film circuits has been fabricated The microstrip precision is better than ±5 μm As show by the test results, the insert loss of 2 bits true-time delay line is-57~-46 dB, the in-band loss variation is less than ±03 dB, and the phase bias at operating frequencies is ±5°

2 citations

Journal Article•
DFT for a RFID IC

[...]

Jing Wei-ping1•
Nantong University1
01 Jan 2013-Electronics & Packaging
TL;DR: DFT of a contactless RFID IC is introduced,analyzing the principle of work and the modules, researching the testing circuits, and people can know the functions and performances of all modules by testing the information of output pad, verifying the whole circuits’ reliability.
Abstract: With CMOS devices dimensions having been down to deep-submicro,the scale,complexity,testing cost of the Intergrated Circuits has been increased sharply,and the people has a increasingly high requirements to Intergrated Circuits’ reliability.The testing of Intergrated Circuits is time-consuming and arduous process,people must take all factor into consideration,such as the functions and performances,in order to a high quality with the lower cost,so the searching for the testing of VISL has been a very important part of IC design.The Design for Testability(DFT) is the test which reduces the difficulty and cost of testing by adding aided circuits.This paper introduces DFT of a contactless RFID IC,analyzing the principle of work and the modules,researching the testing circuits,people can know the functions and performances of all modules by testing the information of output pad,verifying the whole circuits’ reliability.

2 citations

Journal Article•
Design of Cascaded Current Disturbance Generator

[...]

Zhang Yibo
01 Jan 2013-Electronics & Packaging
TL;DR: In this article, a 10 kV /3 MVA current disturbance generator that can be used to simulate various current situations of a practical grid is presented. And the generator is used to generate the desirable current disturbance.
Abstract: With rapid development of power grid around the world,power quality is gathering more and more attentionIn order to analyze and solve the problems which the power quality equipment may encounter in its practical use,a well-developed,multi-functional and reliable disturbance generator is becoming an absolute needThis paper presents a 10 kV /3 MVA current disturbance generator that can be used to simulate various current situations of a practical gridA three phase full bridge unity-power rectifier is employed to supply the DC voltage source while a cascaded multi-level H-bridge converter is used to generate the desirable current disturbanceDetails about the parameter design of the components are also describedA simulation experiment is also conducted to verify the feasibility of the calculation and the equipment itself

1 citations

Journal Article•
ERP Production Planning Module Status, Problems and Optimization Research

[...]

Chen Hezhang1•
Carlisle Companies1
01 Jan 2013-Electronics & Packaging
TL;DR: In this article, the authors present the ERP and APS, MES, PCS integrated information model, and give the traditional ERP production plan module optimization countermeasures.
Abstract: In the production planning management based on the analysis of the present situation,and points out that the ERP system production plan module existing problems.In view of this,puts forward the ERP and APS,MES,PCS integrated information model,and gives the traditional ERP production plan module optimization countermeasures.

1 citations

Journal Article•
Research on Silicon Nitride Films Deposited by PECVD Technology

[...]

Wang Wenju1•
China Electronics Technology Group Corporation (China)1
01 Jan 2013-Electronics & Packaging
TL;DR: In this article, the influence of silane-ammonia flow ratio (SAR) and spacing on the performance of silicon nitride thin films was studied, and it was shown that the thickness and refractive index of thin films increased with SAR, and the etching rate in HF decreased rapidly after annealing.
Abstract: Silicon nitride thin films were deposited successfully on Si substrates by plasma-enhanced chemical vapor deposition(PECVD). The thickness and refractive index of the thin films were tested by ellipsometer and profilometry, respectively. The influences of silane-ammonia flow ratio(SAR)and spacing on the performance of silicon nitride thin films were studied. Results showed that the thickness and refractive index of thin films increased with SAR, and the etching rate in HF decreased rapidly after annealing.

1 citations

Journal Article•
The DDS Based on FPGA

[...]

Zhang Yuji1•
China Electronics Technology Group Corporation (China)1
01 Jan 2013-Electronics & Packaging
TL;DR: This paper uses FPGA implmenting sin signal generator to compose from accumulator,adder and ROM, wide frequency range, minimum step size and adjust of frequency.
Abstract: In this paper we use FPGA implmenting sin signal generator. It is compose from accumulator,adder and ROM. There are much advantage in this DDS. There are wide frequency range, minimum step size and adjust of frequency. The frequency is up to 12.5 MHz.

1 citations

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