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  3. Electronics & Packaging
  4. 2012
Showing papers in "Electronics & Packaging in 2012"
Journal Article•
Research on Reliability of Ball/Column Re-Attachment of CBGA/CCGA ICs

[...]

Gao Nayan1•
China Electronics Technology Group Corporation (China)1
01 Jan 2012-Electronics & Packaging
TL;DR: In this article, the authors mainly focused on three issues: evolvement trend of Niplated layer, evolvement trends of tensile and shear strength of solder balls and columns, analysis of ICs' reliability after rework.
Abstract: Multifunction,small size and weight,high performance and reliability are the development trends for intergrated circuit(IC)In recent years,the application fields(avigation and spaceflight,for example) which require ICs of high reliability,is demanding more and more ICs with CBGA and CCGA package formsIn the process of attaching balls or columns to CLGA shell/substrate and the process of second-assembly of CBGA/CCGA to PCBs,poor soldering is generally induced which possibly cause a failure in useRework of balls/columns attachment is therefor necessaryIn the process of rework,it is important to research the plated layers of pads as well as soldering appearance,voids of soldering interface etcAfter rework of balls/columns attachment,Au-plated layer is of inexistence and Ni-plated layer is partially meltedBoth of the problems challenge the rework process and reliability of ICsThe paper is mainly on 3 issues: evolvement trend of Niplated layer,evolvement trends of tensile and shear strength of solder balls and columns,analysis of ICs’ reliability after rework

4 citations

Journal Article•
Current Status and Development Trend of Electronic Packaging Technology

[...]

Long Le
01 Jan 2012-Electronics & Packaging
TL;DR: The current IC wafer width characteristics is micronanoelectronic scaleThe microminiaturization process of electronic products and electronic systems will depend on the advanced packaging technologyIt has increasingly become a focus of the semiconductor industry as discussed by the authors.
Abstract: The current IC wafer ling width characteristics is micronanoelectronic scaleThe microminiaturization process of electronic products and electronic systems will depend on the advanced packaging technologyIt has increasingly become a focus of the semiconductor industryNovel packaging technology with larger market value around home and abroad in recent years are introducedBasic structures and fabrication processes of some typical packaging are bescribed in detailFurthermore,it is pointed out current status a nd development trend of packaging technologyIn the recent years,endless varieties of packagings are proposedIt implements a new and higher level of packaging integration with higher assemble density,more strong features,better performance,smalles size,lower power consumption,faster speed,smaller delay,cost reduction,etcResearches and process of packaging cannot be ignoredIt has a great market potential and development in the days to comeAdvanced packaging technology are forcing semiconductor industry access the More-than-Moore era

3 citations

Journal Article•
Research Status of Through-Silicon Via Interconnection for 3D Integration Technology

[...]

WU Xiang-dong1•
China Electronics Technology Group Corporation (China)1
01 Jan 2012-Electronics & Packaging
TL;DR: In this article, the authors summarized nearly two years of foreign literature about 3D-TSV integrated interconnect technology and processes and discussed the future trend of technology is discussed, the main ones are reduction of interconnects length, electrical performance improvement induced and wider range of possibilities for heterogeneous integration.
Abstract: To meet the growing trend of Moore’s Law,chip technology has come "More than Moore" era of 3D integration.Further miniaturization of electronic systems and performance,3D integration solution is needed more and more.As for the demand-driven,the through-silicon vias(TSV)interconnect technology emerged as the three-dimensional integration and it is one of key techniques for 3D integration and waferlevel packaging.TSV integration is compared with raditional assembly methods,there are several advantages to adopt this technology.The main ones are: reduction of interconnects length,electrical performance improvement induced and wider range of possibilities for heterogeneous integration.3D integration would then allow to build systems including several families of components usually hardly compatible,like RF devices,memory,logic and MEMS.In this paper,nearly two years of foreign literature about 3D-TSV integrated interconnect technology and processes are summarized,the future trend of technology is discussed.

3 citations

Journal Article•
A 600bps Speech Coder Based on MELP

[...]

Wu Hui1•
China Electronics Technology Group Corporation (China)1
01 Jan 2012-Electronics & Packaging
TL;DR: The paper describes a 600bps speech coder based on MELP(enhanced mixed excitation linear prediction) algorithm that makes the quality of the synthetic voice better ever at 600bps.
Abstract: The paper describes a 600bps speech coder based on MELP(enhanced mixed excitation linear prediction) algorithm.Consecutive three speech frames are grouped into super-frame and are jointly quantized by utilizing inter-frame redundancy in coder.The LSF vector is quantized with multi-mode predictive and multistage matrix quantization that handle mode transition by predictive coefficient and different mode in super-frames.The efficiency of the quantization is improved by joint quantization of pitch and gain.All of that make the quality of the synthetic voice better ever at 600bps.

2 citations

Journal Article•
Research of the Effect on the LED Optical Performance from COB Packaging

[...]

Qin Hui-bin
01 Jan 2012-Electronics & Packaging
TL;DR: In this paper, the COB(Chip On Board) packaging technology is adopted in LED products to meet the requirements of high efficiency and low power dissipation, and the experimental results show that the proposed packaging technique achieves an increase on the luminous efficiency and adjusting of color temperature.
Abstract: In this paper,the COB(Chip On Board) packaging technology is adopted in LED products to meet the requirements of high efficiency and low power dissipation.The optical features of LEDs are analyzed first.Subsequently,different packaging technology and materials are introduced to make a comparison between each other's effects on the flux,luminous efficiency and color temperature.Finally,the COB packaging technology is presented.After the introduction of its structure,advantages and practical utility,experiments are conducted.The experimental results show that the COB packaging not only has the capability of protecting the LED chips,but improves the efficiency and achieves specific optical distribution.Consequently,the proposed packaging technique achieves an increase on the luminous efficiency and adjusting of color temperature.

1 citations

Journal Article•
Research on the Total Dose Radiation Effect of Radiation Hard SRAM-based FPGA

[...]

JI Zhen-kai1•
China Electronics Technology Group Corporation (China)1
01 Jan 2012-Electronics & Packaging
TL;DR: In this paper, the authors investigated the total ionizing dose radiation effects of SRAM based field programmable gate array (FPGA), which is invented by us, and showed that the consumption current augments linearly with total does, but the FPGA can still run normally when the radiation effect can be endured.
Abstract: In space environment,electronic devices are affected by total ionizing dose radiation.This paper investigates the total ionizing dose radiation effects of SRAM based field programmable gate array(FPGA),which is invented by us.The results show that:(1)The consumption current augments linearly with total does,but the FPGA can still run normally when the radiation effect can be endured.(2)The SRAM based FPGA can’t be configured immediately after radiation experiment,since the configuration needs a large transient current.(3)The power current can be regarded as a sensitive parameter to judge the invalidation of the device in the total dose radiation experiment.This work supplies a good technologic base for designing FPGA in the future.

1 citations

Journal Article•
The Influence of Microwave Module’ VSWR Based on Assembly Method

[...]

Tang Liang1•
China Electronics Technology Group Corporation (China)1
01 Jan 2012-Electronics & Packaging
TL;DR: In this article, the three primary factors that affect voltage standing wave ratio during the microwave module assembling process, grounding effect, assembly gap, and interconnection technology, were chosen to conduct a series of experiments.
Abstract: As one of the most important indexes of microwave module inspecting,the voltage standing wave ratio(VSWR) comprehensively represents of the level of circuit design and fabrication,and the values of VSWR determine the quality of products.In the microwave circuit that is used as a parameter distribution circuit,the wavelength of signal is much longer than the length of microstrip line.The interaction of the incident and reflect wave in signal line results in forming the standing wave.As the ratio of maximum voltage and minimum voltage of transmission line,VSWR reflects the signal energy of reflecting to source end under different conditions.The VSWR of microwave module is mainly affected by the factors including module parameters,the cascade matching of devices,and assembly technology.In this paper,the three primary factors that affect VSWR during the microwave module assembling process,grounding effect,assembly gap,and interconnection technology,were chosen to conduct a series of experiments.By applying the theory analysis and comparing the experimental results,the optimum assembly method of microwave module to achieve a better VSWR was obtained.

1 citations

Journal Article•
Design of Main Circuit and Research on Steady State Characteristics for A Novel Multi-functional 10kV Voltage Disturbance Generator

[...]

LI Fupeng
01 Jan 2012-Electronics & Packaging
TL;DR: In this paper, the main circuit for 10kV voltage multifunction voltage disturbance generator using the topology of cascaded H bridges was designed and the simulation results show the good feasibility of main circuit design for device.
Abstract: This paper presents the designing of main circuit for 10kV voltage multifunction voltage disturbance generator,which using the topology of cascaded H bridges.The device is directly connected in a line in series,forming a voltage disturbance source.Combined with the main circuit topology of device,by using the PSCAD/EMTDC software,the steady-state performance of the device is simulated and the simulation results show the good feasibility of main circuit design for device.

1 citations

Journal Article•
The Design of Gateway of Wireless Sensor Network

[...]

YU Zhi-guo1•
China Electronics Technology Group Corporation (China)1
01 Jan 2012-Electronics & Packaging
TL;DR: A gateway of wireless sensor net is designed in this paper and has a capability to access mullti-network, which offers four kinds of different network access methods for Ethernet,CDMA,WiFi and ZigBee and can realize the interconnection between those networks.
Abstract: A gateway of wireless sensor net is designed in this paper.The gateway has a capability to access mullti-network.It offers four kinds of different network access methods for Ethernet,CDMA,WiFi and ZigBee and can realize the interconnection between those networks.The gateway hardware is divided into two parts: the core board and the bottom board to designe.The core board is one of the smallest embedded system,including processor and memory,where the Samsung S3C6410,maximum speed up to 667MHz.And the bottom board integrated a variety of device interface to facilitate connection with the different peripherals.The application software of gateway is programmed in C language and is based on the platform of Linux operation system.

1 citations

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