TL;DR: In this paper, a set of low power design methods is presented and used to different level of A SoC, such as system level, IP module level and RTL level, and power simulation results show that the static and dynamic power of the SoC is quite low.
Abstract: A set of SoC low power design methods is presented and used to different level of A SoC, such as system level, IP module level and RTL level. In system level operating mode is considered, in module level software management is considered and in RTL level gating clock is considered. Power simulation results show that the static and dynamic power of the SoC is quite low. The goals of the low power design methods applied on the design are achieved. The SoC has been implemented in 0.18μm CMOS process, the area is 7.8 mm×7.8 mm , the operation frequency is 80 MHz and the power dissipation is about 454.268 mW.
TL;DR: The FPGA configuration and testing process with ATE-J750 can be regarded as a practical and effective way for the FGPA’s general-purpose test.
Abstract: With the rapid development of IC technology, the application of FPGA becomes more and more widely, and its testing techniques have been paid attention to and research extensively This paper briefly describes the development of FPGA and its major components; presents a specific testing method and proce-dure of FPGA based on the ATE; describes the Intel HEX file format with a set of actual configuration data of Xilinx XC3042,as well as the method of converting it into a binary configuration code, and describes the configu-ration code format and the calculating method of configuration data length of FPGA; Then, explains about the FPGA configuration principle through the configuration circuit schematic diagram and configuration sequence of XC3042 at the mode of Peripheral. At last, this paper describes the FPGA configuration and testing process with ATE-J750.This can be regarded as a practical and effective way for the FPGA’s general-purpose test.
TL;DR: In this article, the first sensor structure and working principle was given based on MEMS technology produced by the piezoresistive silicon micro-accelerometer on the structure and process.
Abstract: Silicon Micro Devices MEMS accelerometer is an important branch, with a wide range of applications. As the silicon micro-accelerometer has a fast response, high sensitivity, high precision, easy-to-small size, etc., and the kind of strong radiation sensors able to work under, it developed rapidly in recent years. The article first sensor structure and working principle was simple, given based on MEMS technology produced by the piezoresistive silicon micro-accelerometer on the structure and process, and produced by the acceleration sensor dynamic test samples, test results show that And basically consistent with the theory of the design value.
TL;DR: System in package (SIP) as mentioned in this paper is characterized by any combination of more than one active electronic component of different functionality plus optionally passives and other devices like MEMS or optical compo- nents assembled into a single standard package that provides multiple functions associated with a system or sub-system.
Abstract: System in package(SIP)is characterized by any combination of more than one active electronic component of different functionality plus optionally passives and other devices like MEMS or optical compo- nents assembled preferred into a single standard package that provides multiple functions associated with a system or sub-system. It uses mature sealing process to integrate many kinds of primary devices with system on chip(SOC)supplementary to realize the hybrid integration. SIP futures design flexible, short cycle and low cost. This article describes development and the superiority SIP, and to discuss the SIP product structure. And also the correlation technology and the future prospects are given.
TL;DR: In this paper, the impact of various via structures using a full-wave electromagnetic simulator (HFSS) was analyzed by modeling and simulation, including via diameter, via height and the excess via stub on SI.
Abstract: Research on discontinuity in transmission lines has became the emphasis in modern high-speed digital designs,especially the vias in multi-layer board.As frequency increases and signal rise time reduces,via causes impedance discontinuities resulting in signal reflections and hence deterioration of signal integrity and system performance.The paper carries out a comprehensive study of various via structures using a full-wave electromagnetic simulator(HFSS).The impact of via diameter,via height and the excess via stub on SI was analyzed by modeling and simulation.
TL;DR: Four key technologies were introduced, which were under bump metallurgy, bumping technology, assembly technology and underfill technology, which directly affected the quality of the flip chip technology.
Abstract: With development of high-density package,the conventional wire bonding technology had not been satisfied for the product need,but the development of flip chip technology can solve this problem and flip chip has been widely used. In the paper,four key technologies were introduced,which were under bump metallurgy,bumping technology,assembly technology and underfill technology. The bumping technology directly af-fected the quality of the flip chip technology. In order to satisfy the need of different production,the currently developed different bumping technologies provided flip chip technology a great foreground. Each characteristic of the technology’s application and the trend of flip chip development are discussed.
TL;DR: In this paper, a real street lamp of LED company, a parameterized model and thermal analysis with ANSYS software for high-power LED was obtained, and an optimized model which can not only limit the highest temperature on LED, but also decrease the mass of the heat sink was obtained by reducing the thickness and separation of fins of heat sink.
Abstract: Light-emitting Diod(eLED), the fourth generation light, has already been widely used in illumination devices, but the transformation efficiency of electricity to light is still low, so how to improve the capability of the heat sink become one of the key technical issues for the industrialization of high-power LED Based on a real street lamp of LED company, a parameterized model and thermal analysis with ANSYS software for high-power LED was obtained The steady-state temperature fields of LED with difference of structure dimensions of the heat sink were compared using orthogonal experimental design, and an optimized model which can not only limit the highest temperature on LED, but also decrease the mass of the heat sink was obtained by reducing the thickness and separation of fins of the heat sink A case analysis of LED street lamp shows that optimized weight reduces to 3340% of original weight
TL;DR: In this article, three kinds of SnPb solders with different ratios of Pb and two lead-free solders are assessed by Finite Element numerical simulation method in the plastic strain of QFP solder joint,calculating the different behaviors of plastic strain caused by solder's different parameters in our model of ΔPS≈-2.56Δ(Q/R) and with the responding plastic strain reduction 89% than before.
Abstract: The element lead has egative effects for human body with neural toxicity and for environment in heavy-metal contamination,so far the Packaging field has put highlight onto the researches of lead-free solders.Three kinds of SnPb solders with different ratios of Pb and two lead-free solders are assessed by Finite Element numerical simulation method in the plastic strain of QFP solder joint,calculating the different behaviors of plastic strain caused by solder's different parameters in our model of ΔPS≈-2.56Δ(Q/R) and with the responding plastic strain reduction 89% than before.This work brought some new references to the solder choices in QFP packaging for the future.
TL;DR: In this article, the packaging technology from the point of view of the package to create a detailed, as well as on the process were the main points of concern, this article would like to be able to work in this field technicians provide valuable technical information.
Abstract: System-in-Packag(eSIP)technology from the early 1990s made up to now, after more than a decade of development, has extensive academic and industry acceptance and become the new hot technology and one of the major directions, it represents the future direction of the development of electronic technology, SIPpackaging technology as a SIPpackaging technology an important component,the years of constant in- novation has grown by leaps and bounds, and has gradually formed its own technology system, should be engaged in technology-related industry, technicians and academics to conduct research and study,In this paper, packaging technology from the point of view of the package to create a detailed, as well as on the process were the main points of concern, this article would like to be able to work in this field technicians provide valuable technical information.
TL;DR: In this article, the influence of the content of Ag and Cu to function of the Sn-Ag-Cu Solder and analysis the microstructure of the solder by experiment is discussed.
Abstract: The RD of the lead-free solder of high performance has been pushed forward by the highly developed environment conservation and integrated microelectronic devices. The electronics industry begins to focus upon the Sn-Ag-Cu system alloys as they have the advantages of good reliability and good solderability. This text studies the influence of the content of Ag and Cu to function of the Sn-Ag-Cu Solder and analysis the microstructure of the solder by experiment. It shows no advantages in terms of processing, reliability,or availability for the high-silver alloys as compared to the low-silver alloys.And the Sn-2.9Ag-1.2Cu solder has the lower melting point and the better spreadability. It provides the basis for the best performance of the Sn-Ag-Cu Lead-free Solder.
TL;DR: In this paper, a thermal management method with thermoelectric (TE) cooler for high power light emitting diode (LED) packaging module is investigated, which can effectively reduce working temperature of the LED, the temperature can be reduced over 36% for substrate, compared with without TE cooler.
Abstract: A novel thermal management method with thermoelectric (TE) cooler for high power light emitting diode (LED) packaging module is investigated. The high power LED array packaging module is fabricated using chip-on-board technology. In order to solve heat dissipation, the TE cooler is used to transfer the heat produced by the LED chips to environment. The thermocouple is used to measure the temperature of different parts of the module. Its optical property is measured by Intensity Distributing Test Meter. The results show that the high power LED array packaging module integrated with TE cooler can effectively reduce the working temperature of the LED, the temperature can be reduced over 36% for substrate, compared with without TE cooler. Optical property measurement shows that the LED has a luminous efficacy of 30.18 lm/W.
TL;DR: In this paper, the authors introduced the research of multilayer co-fired AlN ceramic metallization process and studied the process of printing, stacking, laminating and firing.
Abstract: AlN ceramic is widely used in many fields because of its high thermal conduction,good insulation and innocuityMultilayer co-fired AlN ceramic is a type of high performance ceramic that is printed in thick film to form multilayer circuit and fired in a certain atmosphere in high temperatureMetallization is a key process of multilayer co-fired AlN ceramicThe paper introduces the research of multilayer co-fired AlN ceramic metallization processThe process of printing,stacking,laminating and firing is studied with emphasisThrough the study of the process,the thermal conductivity of the ceramic is over 170W(m·K) ~(-1) and the square resistance of metallization is less than 18mΩ/□The pull strength of metallization is over 18N(1mm~2 soldering area) It can meet the requirement of high power LED package and high power package and has been used in many kinds of packages and substrates
TL;DR: In this paper, the development status of power semiconductor and Intelligent/Smart Power Module, analyzed the SPM/IPM package structure, character, process flow and materials including the process problems and solutions, and finally discussed the trend of package design.
Abstract: In consumer and general industrial filed,the development for Intelligent/Smart Power Module for power and motor control application is facing the big challenge on robust design,Packaging Process Optimization,Yield Improvement,Cost Reduction and Capacity Increment.The solution for these problems are the Package Design itself.While the product application,reliability and marketing factors are becoming the limit to designer's imagination.The paper introduced the development status of power semiconductor and Intelligent/Smart Power Module,analyzed the SPM/IPM package structure,character,process flow and materials including the process problems and solutions,finally discussed the trend of package design.
TL;DR: In this paper, key problems affecting copper wire processes had been analyzed through a series of studies, such as wire bonder modifing on hardware and software to reach copper wire requirements, microhardness test, breakage volts test, thermal stability, ball to pad electrical resistance.
Abstract: Tranditional semiconductor packages are based on Al wire and Au wire. Power devices normally use Al wire as connection between wire bonding pad of die and leadframe. Other devices except power use Au wire. Because of high cost of Au wire, people have been searching the replacement for it. Cu wire naturally caused the attention because of the physical and chemical characteristics are not big difference from Au wire but the price is much lower. In this paper key problems affecting copper wire processes had been analysed through a series studies. These are wire bonder modifing on hardware and software to reach copper wire requirements, microhardness test, breakage volts test, thermal stability, ball to pad electrical resistance. All these elements have effects on copper wire products reliability and parameters. The differences between copper wire and gold wire had been compared each other to guide the mass production.