About: Electronic Engineer is an academic journal. The journal publishes majorly in the area(s): Software & Interface (computing). Over the lifetime, 94 publications have been published receiving 207 citations.
TL;DR: This paper proposes an ETA based on BDD (binary decision diagrams), which improves both the efficiency and accuracy, and it also provides a new approach to reliability analysis of complex systems.
Abstract: When used in analyzing the reliability of complex systems,the traditional ETA(event-tree analysis) is not adequate.In this paper we propose an ETA based on BDD(binary decision diagrams).Moreover,attention is paid on the abnormal situation where there is dependency among the branch point events.BDD provide an alternative logic form for the fault-tree structure to express the system failure causes and analyze the top event.During the process of reliability analysis,the MCS and PI are not required as an intermediate stage,so this method improves both the efficiency and accuracy,and it also provides a new approach to reliability analysis of complex systems.
TL;DR: A new design of home safeguard system based on GSM technique is presented and a detailed explanation of the system operation and the using of AT command is presented.
Abstract: From the principle of convenience and max reduction of the operation cost,this paper proposes one design of home safeguard system based on GSM technique.The hardware,software design,the using of GSM terminal are briefly introduced and the design of MCU and GSM Terminal interface is described.By a detailed explanation of the system operation and the using of AT command,a new design of home safeguard system is presented.
TL;DR: The hardware adopts the chips EP1K30TC144-3 of Altera company, uses the modularity method to design the transmitter module, receiver module and baud rate generator respectively and implements a model of programmable UART by using the Field Programmable Gate Array (FPGA).
Abstract: This paper adopts the VHDL language to be the hardware function description method.The hardware adopts the chips EP1K30TC144-3 of Altera company,uses the modularity method to design the transmitter module,receiver module and baud rate generator respectively.It designs,compilers and simulates the UART in MaxplusII environment.It implements a model of programmable UART by using the Field Programmable Gate Array(FPGA).The system implements the serial communication of the PC and UART by VB6.0 program.
TL;DR: This system can satisfy the acquisition speed requirement of the most situation [HT5,5] with its 30KS/s acquisition speed and 12 bit precision and it is efficient to develop.
Abstract: This paper introduces an economical and practical data acquisition system based on LabVIEW and a single-chip digital processor system.The software and hardware are also given in detail in this article. The system has high data acquisition speed and reliability, good commonality and extensibility,and it is efficient to develop. This system can satisfy the acquisition speed requirement of the most situation [HT5,5" ]with its 30KS/s acquisition speed and 12 bit precision.
TL;DR: Theoretical analysis, simulated numerically, and experiment for subnanosecond EMP simulator are carried out and the actual spatial distribution of the electric-field agrees well the numerical results.
Abstract: Theoretical analysis,simulated numerically,and experiment for subnanosecond EMP simulator are carried out in this paper.Leading edge rise time of the subnanosecond EMP simulator can reach subnanoseconds.The stability is good.Distribution of the electric-field is uniform and can satisfy various test requirements.During the development of the subnanosecond EMP simulator,we have simulated numerically the transmission and spatial distribution of the electric-field by Finite Difference-Time Domain method and contour integral method.From the data the test zone of the EMP simulator is determined.The actual spatial distribution of the electric-field agrees well the numerical results.