Electronics Packaging Technology Conference 

Abstract: Combined differential-mode and common-mode (mixed-mode) scattering parameters (S-parameters) are well adapted to accurate measurements of linear networks at RF and microwave frequencies. The relationships between standard S-parameters with two-port vector network analyzer (VNA) and mixed-mode S-parameters with four-port VNA are derived in this paper. An example differential structure was measured with standard two-port VNA and mixed-mode four-port VNA. The correlation of standard s-parameters and mixed-mode S-parameters is presented as well.

Abstract: The main challenges of today's device packaging are miniaturization, continuously increasing operating frequencies/high data rates, high number of I/Os, reliability, and thermal requirements One of the major package trends driven by mobile-phone applications is the Wafer Level Ball Grid Array (WLB) Drivers for the implementation of WLB technology are cost reduction, smaller form factor and better electrical performance with respect to high frequency applications Thin-film WLB technology consists in realizing additional redistribution layers above the passivation of a semiconductor chip using standard thin-film techniques to rearrange peripheral pads on the wafer in an array pattern A hard limit will be reached with this technology, when the number of I/Os reaches a larger number dian can be fitted on the silicon chip at a given pitch We introduce Infineon's embedded Wafer Level Ball Grid Array technology, which allows fitting interconnects onto a so-called fan-out area extending the chip area The core process of this emerging technology is the encapsulation of silicon dice by compression molding The eWLB technology is a forward-looking development of the WLB technology, upholding the known benefits such as small package dimensions, excellent electrical and thermal performance, and maximum connection density However, this technology significantly increases the functionality and application spread Due to eWLB complex semiconductor chips such as modem and processor chips for applications in mobile communications require a high number of solder connections with standardized contact spacing to be produced with a minimal footprint At the same time, the packages can be provided with as many solder contacts as needed The possibility of additional wiring area around the chip proper means that the wafer-level packaging technology also lends itself to new space-sensitive applications We demonstrate the capabilities of Infineon's molded embedded Wafer Level Package Technology and show how we extended it towards a Platform Technology The qualified Platform we introduce here covers currently a range of package sizes up to 8×8mm2 at a ball pitch of 05mm The Qualification Criteria we have applied follow the tests described in JEDEC Standard Number 26-A

Abstract: While the characterisation of intermetallic coverage and intermetallic phase (IP) growth in gold ball bonding on aluminium is quite well understood, there is relatively little literature concerning the morphology and growth of IP's between Cu balls bonded on aluminium pad metallisation The difference between Cu-Al IP growth compared with the well known Au-Al IP's has been studied mainly of larger wire diameter (35-50/spl mu/m) in the early 1980's Cu wire ball bonding has been established for many years mainly for high power devices at wire diameters /spl ges/ 38/spl mu/m and fine wire for discrete device applications However, there is now interest in fine pitch Cu wire ball bonding at smaller wire diameters of 25/spl mu/m and smaller for high pin count applications, driven mainly by cost reduction Development and optimisation of robust copper wire bonding processes for such applications requires an assessment of intermetallic coverage and Cu-Al intermetallic growth after isothermal aging This work describes the problems associated with coverage determination, some characteristics of Cu-Al and Au-Al intermetallic compounds and characterises the difference in the IP growth between Au-Al and Cu-Al The relative merits of gold and copper ballbonding are also briefly discussed

Abstract: The embedded wafer level ball grid array (eWLB) is a novel packaging technology that shows excellent performance for millimeter-wave (mm-wave) applications. We present simulation and measurement results of single-ended and differential transmission lines realized using the thin-film redistribution layers (RDL) of an eWLB. We demonstrate the capabilities for the integration of passives on example of a configurable 17/18 GHz down-converter circuit realized in silicon-germanium (SiGe) technology with a fan-in eWLB differential inductor used for the LC tank. We compare the performance of differential chip-package-board transitions realized in an eWLB and in other common package types. We report an optimized compact chip-package-board transition in the eWLB. We obtain a simulated insertion loss as low as −0.65 dB and a return loss below −16 dB at 77 GHz without external matching networks. We introduce the concept of antenna integration in the eWLB and show examples of single-ended and differential antenna structures. Finally, we present for the first time a single-chip four-channel 77 GHz transceiver in SiGe integrated in the eWLB package together with four dipole antennas. The presented examples demonstrate that the eWLB technology is an attractive candidate for mm-wave applications including system-in-package (SiP).