5 Papers
28 Citations
Zengwei Ju is an academic researcher from Huazhong University of Science and Technology. The author has contributed to research in topics: Second-generation wavelet transform & Lifting scheme. The author has an hindex of 3, co-authored 5 publications.
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Papers
Accelerated implementation of adaptive directional lifting-based discrete wavelet transform on GPU
TL;DR: The results show that the Slice method overcomes the limitation of high data dependency between the lifting steps and achieves more than 10 times speedup compared to the optimized CPU implementation for the ADL-based transform.
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An improved hybrid fast mode decision method for H.264/AVC intra coding with local information
TL;DR: An improved hybrid fast mode decision method for H.264/AVC intra coding is proposed, which is based on the analysis of edge filter and more efficient mode selection, which demonstrated that better coding performance is achieved.
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A Lifting Scheme of Symmetric-antisymmetric Multiwavelet Transform for Image Coding
TL;DR: The experimental results show this lifting scheme can achieve lower complexity while preserve high quality for image coding and reduce the redundant computations in prefiltering.
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Non-attention region first initialisation of k-means clustering for saliency detection
TL;DR: According to the nature of saliency map generation with colour contrast, a non-attention region first initialisation (NARFI) k-means clustering for saliency detection is proposed and the saliency values of the attention region with the NARFI k-measures clustering are more conspicuous than those with the k-Means++ clustering.
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Accelerating adaptive directional lifting based wavelet decomposition on GPU using CUDA
Jiazhong Chen,Zengwei Ju,Hua Cao,Tao Xia,Yingying Dai,Ning Wang,Ping Xie,Leihua Qin +7 more
- 01 Oct 2012
TL;DR: A new configuration method so-called Slice is proposed for implementation of the ADL-based transforms on GPUs, which overcomes the limitation of high data dependency between ADL steps, and achieves more than 10 times speedup compared to the optimized CPU implementation.
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