Gallium oxide (Ga2O3) is emerging as a viable candidate for certain classes of power electronics, solar blind UV photodetectors, solar cells, and sensors with capabilities beyond existing technologies due to its large bandgap. It is usually reported that there are five different polymorphs of Ga2O3, namely, the monoclinic (β-Ga2O3), rhombohedral (α), defective spinel (γ), cubic (δ), or orthorhombic (e) structures. Of these, the β-polymorph is the stable form under normal conditions and has been the most widely studied and utilized. Since melt growth techniques can be used to grow bulk crystals of β-GaO3, the cost of producing larger area, uniform substrates is potentially lower compared to the vapor growth techniques used to manufacture bulk crystals of GaN and SiC. The performance of technologically important high voltage rectifiers and enhancement-mode Metal-Oxide Field Effect Transistors benefit from the larger critical electric field of β-Ga2O3 relative to either SiC or GaN. However, the absence of clear demonstrations of p-type doping in Ga2O3, which may be a fundamental issue resulting from the band structure, makes it very difficult to simultaneously achieve low turn-on voltages and ultra-high breakdown. The purpose of this review is to summarize recent advances in the growth, processing, and device performance of the most widely studied polymorph, β-Ga2O3. The role of defects and impurities on the transport and optical properties of bulk, epitaxial, and nanostructures material, the difficulty in p-type doping, and the development of processing techniques like etching, contact formation, dielectrics for gate formation, and passivation are discussed. Areas where continued development is needed to fully exploit the properties of Ga2O3 are identified.

A review of Ga2O3 materials, processing, and devices

Two-dimensional (2D) materials have attracted increasing research interest because of the abundant choice of materials with diverse and tunable electronic, optical, and chemical properties. Moreover, 2D material based heterostructures combining several individual 2D materials provide unique platforms to create an almost infinite number of materials and show exotic physical phenomena as well as new properties and applications. To achieve these high expectations, methods for the scalable preparation of 2D materials and 2D heterostructures of high quality and low cost must be developed. Chemical vapor deposition (CVD) is a powerful method which may meet the above requirements, and has been extensively used to grow 2D materials and their heterostructures in recent years, despite several challenges remaining. In this review of the challenges in the CVD growth of 2D materials, we highlight recent advances in the controlled growth of single crystal 2D materials, with an emphasis on semiconducting transition meta...

Chemical Vapor Deposition Growth and Applications of Two-Dimensional Materials and Their Heterostructures

Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here.

/pdf/the-2018-gan-power-electronics-roadmap-2iunv619fh.pdf

The 2018 GaN power electronics roadmap

Gallium nitride (GaN) power devices are an emerging technology that have only recently become available commercially. This new technology enables the design of converters at higher frequencies and efficiencies than those achievable with conventional Si devices. This paper reviews the characteristics and commercial status of both vertical and lateral GaN power devices, providing the background necessary to understand the significance of these recent developments. In addition, the challenges encountered in GaN-based converter design are considered, such as the consequences of faster switching on gate driver design and board layout. Other issues include the unique reverse conduction behavior, dynamic $R_{\mathrm {{ds}},\mathrm {{on}}}$ , breakdown mechanisms, thermal design, device availability, and reliability qualification. This review will help prepare the reader to effectively design GaN-based converters, as these devices become increasingly available on a commercial scale.

Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges

https://absimage.aps.org/image/MAR14/MWS_MAR14-2014-020819.pdf

Van der Waals heterostructures

This work demonstrates a lateral Ga 2 O 3 Schottky barrier diode (SBD) with a breakdown voltage ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BV ) over 10 kV, the highest <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BV reported in Ga 2 O 3 devices to date. The 10 kV SBD shows good thermal stability up to 200 °C, which is among the highest operational temperatures reported in multi-kilovolt Ga 2 O 3 devices. The key device design for achieving such high <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BV is a reduced surface field (RESURF) structure based on the p-type nickel oxide (NiO), which balances the depletion charges in the n-Ga 2 O 3 channel at high voltage. At <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BV , the charge-balanced Ga 2 O 3 SBD shows an average lateral electric field (E-field) over 4.7 MV/cm at 25 °C and over 3.5 MV/cm at 200 °C, both of which exceed the critical E-field of GaN and SiC. The 10 kV SBD shows a specific on-resistance of 0.27 Ω∙cm 2 and a turn-on voltage of 1 V; at 200 °C, the former doubles and the latter reduces to 0.7 V. These results suggest the good potential of Ga 2 O 3 devices for medium-and high-voltage, high-temperature power applications.

10 kV Ga2O3 Charge-Balance Schottky Rectifier Operational at 200 °C

This work demonstrates multi-kilovolt AlGaN/GaN Schottky barrier diodes (SBDs) on a 4-inch, five-channel, low-cost GaN-on-sapphire wafer. Our device highlights a new 3-D anode architecture, in which the p-n junction wraps around the multi-2DEG-channel fins. This junction-fin structure differs from all existing tri-anode and tri-gate structures, which employ a Schottky or a metal-insulator-semiconductor (MIS) stack at the fin sidewalls. Our junction-fin structure is realized with regrown p-GaN on the top of the fin and p-type NiO x at the fin sidewalls. Thanks to the strong charge depletion, this structure allows an over 10-fold reduction in device leakage current. The top p-GaN further extends towards the cathode, which shields the fin-anode region from the high electric field. Our SBDs show a breakdown voltage (BV) up to 5.2 kV with a leakage current of 1.4 μΑ/mm at 90% BV, as well as a specific on-resistance (R on ) of 13.5 mQ•cm2, rending a Baliga's figure of merit (FOM) of 2 GW/cm2, which exceeds the SiC 1-D unipolar limit and is among the highest in all multi-kilovolt power SBDs. In addition, large-area multi-channel AlGaN/GaN SBDs are demonstrated for the first time, with a 1.5 A current, a 4.8 kV BV with ~μΑ leakage current, and a 13 nC total charge. These results show the great potential of AlGaN/GaN multi-channel devices for medium- and high-voltage power applications.

5 kV Multi-Channel AlGaN/GaN Power Schottky Barrier Diodes with Junction-Fin-Anode

The scaling behaviors of dynamic ferroelectric hysteresis in the relaxor ferroelectric 0.67Pb(Mg1/3Nb2/3)O3–0.33PbTiO3 (PMNT67/33) ceramics near the morphotropic phase boundary (MPB) and other PMNT systems out of MPB region were investigated. The scaling relation of hysteresis area 〈A〉 against frequency f and field amplitude E0 for minor loops takes the form of 〈A〉∝f−0.2391E04.8779; while for the saturated loops, it is 〈A〉∝f 0.0401E00.5722. The scaling relations of PMNT67/33 ceramics are significantly different from those of other ferroelectrics, and the results of the analysis indicate that domain reversal in it is much more sensitive to the change of E0 at low electric field and responses more quickly to f at high electric field than other normal ferroelectrics. The coexistence of rhombohedral (R), monoclinic (M) and tetragonal (T) phases near the MPB and the polar nanoregions seems to play the key role in the dynamic behavior of the domain reversal in relaxor PMNT67/33 ceramics.

Scaling behavior of dynamic hysteresis in relaxor ferroelectric 0.67Pb(Mg1/3Nb2/3)O3–0.33PbTiO3 ceramics

High voltage GaN HEMTs are leading contenders for power conversion and switching applications [1]. An accurate physics-based compact device model for this emerging technology is essential for device and circuit design. Several GaN HEMT compact models have been discussed but are not physics-based [2]-[3]. Here, a new physics-based compact model for HV-GaN HEMTs, the MIT Virtual Source GaNFET-High Voltage model (MVS-G-HV) is proposed. The model is geometry scalable and captures static and dynamic device behavior through self-consistent current and charge expressions. The access regions, which are important in device linearity [4] and reverse voltage blocking, are modeled as implicit-gated transistors. The model includes the effect of field plates and can be used to maximize the BV2 Gon figure-of-merit. In addition, `knee-walkout' in these devices is captured in the model through a simple trap-transistor model. The model requires a small number of parameters with straightforward physical meanings and is validated against DC-IV, S-parameter, breakdown and pulsed measurements of fabricated devices.

High voltage GaN HEMT compact model: Experimental verification, field plate optimization and charge trapping

Insufficient short-circuit (SC) robustness of currently commercial GaN power devices, i.e., the high electron mobility transistors (HEMTs), is a key roadblock for their applications in automotive powertrains. At a 400 V bus voltage (<italic>V</italic>BUS), the SC withstanding time (<italic>t</italic>SC) of commercial GaN HEMTs is typically below 1 μs, far below the usual system requirement (>10 μs). This letter presents breakthrough short-circuit capability in a vertical GaN fin-channel junction-gate field-effect transistor (Fin-JFET). The Fin-JFET is normally <sc>off</sc> with a 0.7 mΩ·cm2 specific <sc>on</sc>-resistance and 800 V avalanche breakdown voltage (BVAVA) at the room temperature. The gate driver in the short-circuit test was designed to be identical to that in device switching applications. The <italic>t</italic>SC of GaN Fin-JFETs was measured to be 30.5 μs at a <italic>V</italic>BUS of 400 V, 17.0 μs at 600 V, and 11.6 μs at 800 V, all among the longest reported for 600–700 V normally <sc>off</sc> transistors. In addition, GaN Fin-JFETs failed open in these tests and retained BVAVA after failure, which is highly desirable for system applications. In the repetitive 10 <italic>μ</italic>s, 400 V short-circuit tests, GaN Fin-JFETs showed no degradation after 30 000 cycles. Furthermore, to the best of our knowledge, this is the first report of a power transistor with good short-circuit ruggedness at a bus voltage close to its BVAVA. The underlying mechanism is the unique avalanche-through-fin in the Fin-JFET, which is validated by mixed-mode TCAD simulations and unclamped inductive switching tests. These results reveal the inherent ruggedness of GaN Fin-JFETs in the concurrent presence of short-circuit and overvoltage in power electronics systems.

Breakthrough Short Circuit Robustness Demonstrated in Vertical GaN Fin JFET

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