Let’s HPC: A web-based platform to aid parallel, distributed and high performance computing education

Emerging technologies and increased computing resources challenge the universities to establish learning environments, where the students will learn to efficiently utilize multicore or multi-chip multiprocessors. In this paper, we present a new pilot project with the following goals: (1) as an e-Learning platform for the course on Parallel and Distributed Computing, and (2) as a benchmarking plat-form to measure the algorithm performance indicators such as speed, speedup and efficiency of the parallel implementation.

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E-learning and Benchmarking Platform for Parallel and Distributed Computing

We have recently developed and implemented an E-learning and Benchmarking Platform for the Parallel and Distributed Computing Course. Although this platform reduced the students' problems, we faced an additional problem with the lack of resources expressed in a specific timeframe just before homework deadline. In this paper we propose using a cloud based architecture of an e-Elearning system. It is intended to upgrade the e-Learning and benchmarking platform prototype into a scalable and elastic platform, where the system will send the execution on the virtual machine instance hosted on the cloud node with available resources. Additionally, we propose a strategy for efficient utilisation of cloud resources is proposed.

Cloud E-learning and Benchmarking Platform for the Parallel and Distributed Computing Course

The invention discloses a memory management method for polykaryon parallel discrete event simulation. The memory management method disclosed by the invention aims to avoid the problem that a plurality of logical processes simultaneously apply memory in the course of simulation experiments, and the synchronous operation of memory application is avoided. The technical scheme disclosed by the memory management method is that firstly, N logical processes and a GVT calculation process are established; the N logical processes concurrently process events, apply memory from own memory pools, transmit the events, receive the events, and transmit event package messages to the GVT calculation process; the GVT calculation process calculates a GVT value and transmits GVT notification messages to all the logical processes; the N logical processes read the GVT notification messages, obtain the GVT value, and recover the memories occupied by the events of which the timestamps are shorter than overall virtual time. The recovered memories are put in the memory pools of the logical processes of processed events, but not the memory pool where the memories are located when the memories are distributed. Through the adoption of the memory management method disclosed by the invention, the synchronous problem caused by that a single memory pool is used for distribution and recovery and the problem that multiple logical processes compete for the memory can be solved, and the usage efficiency of the memories is improved.

Memory management method for polykaryon parallel discrete event simulation

Operating systems include many heuristic algorithms designed to improve overall storage performance and throughput. Because such heuristics cannot work well for all conditions and workloads, system designers resorted to exposing numerous tunable parameters to users—thus burdening users with continually optimizing their own storage systems and applications. Storage systems are usually responsible for most latency in I/O-heavy applications, so even a small latency improvement can be significant. Machine learning (ML) techniques promise to learn patterns, generalize from them, and enable optimal solutions that adapt to changing workloads. We propose that ML solutions become a first-class component in OSs and replace manual heuristics to optimize storage systems dynamically. In this article, we describe our proposed ML architecture, called KML. We developed a prototype KML architecture and applied it to two case studies: optimizing readahead and NFS read-size values. Our experiments show that KML consumes less than 4 KB of dynamic kernel memory, has a CPU overhead smaller than 0.2%, and yet can learn patterns and improve I/O throughput by as much as 2.3× and 15× for two case studies—even for complex, never-seen-before, concurrently running mixed workloads on different storage devices.

Improving Storage Systems Using Machine Learning

This paper describes the design and application of an execution-driven parallel simulator for predicting performance of Large-Scale Parallel Computers. The simulator can be used in hardware validation and software development for large-scale parallel computers. It simulates processors of each node, network components and disk I/O components. To illustrate the capabilities of our simulator, we describe experiments running the High Performance Linpack Benchmark on a simulated parallel computer. It gains sound speedup and executes fast enough to run complex MPI codes.

A Parallel Simulator for Large-Scale Parallel Computers

Applications such as multimedia, date mining- and scientific computing may exhibit sophisticated data access patterns that are different from one application to another. I/O prefetching is considered to be effective in improving I/O performance. However, the efficiency depends on identification of patterns for future I/O accesses, which is difficult to achieve in multi-application environment. This paper presents the design, implementation, and evaluation of an I/O feature-based prefetching strategy (FFP) for multiple application systems. The key idea of FFP is to extract I/O features from the collected file access information to guide prefetching. We first analyzed the I/O access patterns and designed a simple and effective feature notation to represent patterns. Then we developed a toolkit to generate and update I/O features automatically. Finally, we designed and implemented an I/O feature-based file prefetching thread library for the multi-application environment. Experimental results show that the proposed prefetching mechanism (FFP) improves I/O performance significantly for applications with complex I/O data access patterns.

I/O Feature-based File Prefetching for Multi-Applications

The invention discloses a time sequence controlling method for parallel simulation of a cluster system. The time sequence controlling method comprises the following steps of: establishing a logical clock for all processes of a target system according to a simulation event captured by a host system; and then maintaining and updating the state of the logical clock according to the running state of a simulation time in the target system to acquire the running time of the processes in the target system. Time-simulation events EVE are scanned according to host-target mapping relationship MAP to acquire an event buffer queue Qi of each target node in the target system. The method effectively improves the efficiency of a simulator on the premise of ensuring certain simulation accuracy for large-scale parallel system simulation.

Time sequence controlling method for parallel simulation of cluster system

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Papers

A Parallel Simulator for Large-Scale Parallel Computers

I/O Feature-based File Prefetching for Multi-Applications

Time sequence controlling method for parallel simulation of cluster system