Transformerless grid-connected inverters (TLI) feature high efficiency, low cost, low volume, and weight due to using neither line-frequency transformers nor high-frequency transformers Therefore, TLIs have been extensively investigated in the academic community and popularly installed in distributed photovoltaic grid-connected systems during the past decade This article analyzes and summarizes the state of the art of TLI techniques, three rules of maintaining constant common-mode voltage (CMV) of TLIs at switching frequency have been concluded from a generic CMV analysis model at the beginning Second, suppression methods of leakage current (LC) and dc current injection (DCCI), so-called two key challenges for first-generation TLIs, have been classified and discussed in detail, respectively Finally, future trends and some challenges of TLIs based on wide bandgap devices named second-generation TLIs have been presented in this article

Overview of Transformerless Photovoltaic Grid-Connected Inverters

The hybrid switch concept of paralleling a higher-current main Si IGBT and a lower-current auxiliary SiC mosfet offers an improved cost/performance tradeoff in power converters. Currently, the gate control strategy of these two internal devices emphasizes on minimizing the total power loss, and is referred to as the efficiency control mode in this paper. However, there is a serious risk of overheating and reliability degradation of the SiC mosfet if solely relying on this control strategy. In this paper, we propose a new method of gate control optimization, referred to as the thermal balance control mode, to keep the junction temperature of both devices within the specified temperature range, and to minimize the total power loss simultaneously. We first investigate the dependency of the hybrid switch switching losses on the gate control pattern both theoretically and experimentally. We then extensively study control optimization in these two distinct control modes in a dc–dc boost converter. It is found that the thermal balance control mode can achieve almost the same total power loss as the efficiency control mode, but much lower and more balanced junction temperatures of the two internal devices. Experimental results demonstrate that the Si/SiC hybrid switch in an optimal thermal balance control mode can achieve a 163% higher power handling capability in the 20-kHz boost converter or four times higher switching frequency in the 4-kW boost converter than a single IGBT solution with hard switching condition, and yet a considerably lower component cost than a single SiC mosfet solution in the boost converter.

Gate Control Optimization of Si/SiC Hybrid Switch for Junction Temperature Balance and Power Loss Reduction

Si/SiC hybrid switches of parallel Si insulated-gate bipolar transistor (IGBT) and SiC metal–oxide–semiconductor field-effect transistor ( mosfet ) offer most of the SiC benefits but at a much lower cost in comparison to a full SiC solution. The hybrid switch can be optimized to achieve a minimum total power loss while utilizing the smallest SiC chip size without exceeding the specified maximum junction temperature. In this article, we first develop a generalized power loss model for Si/SiC hybrid switches with total power loss and junction temperature as outputs and SiC device size as a continuous input variable, and then develop a methodology to minimize SiC device size while optimizing total IGBT/ mosfet power loss and ensuring maximum junction temperature still below 150 °C. The power loss model is experimentally validated through both simple double pulse testing and a dc–dc buck converter case study. Using the model and optimization methodology, a minimum SiC device size can be obtained with optimized power loss and safe operation temperature.

Power Loss Model and Device Sizing Optimization of Si/SiC Hybrid Switches

Various Si/SiC hybrid device concepts aim at achieving SiC performance at a significantly reduced cost in comparison to full SiC solutions. Both the insulated-gate bipolar transistor (IGBT)(Si)/Schottky(SiC) hybrid pair and the IGBT(Si)/MOSFET(SiC) hybrid switch offer a substantial reduction in switching losses but operate quite differently. This article compares the performance of these two hybrid device concepts in a voltage source inverter (VSI). The basic operation principle, conduction, and switching characteristics of the two hybrid configurations are directly compared, and an improved power loss model is developed for these two solutions in VSI. Two single-phase VSI prototypes using these two hybrid devices are built and tested, respectively. Experimental results show that a 1200-V hybrid IGBT/MOSFET solution achieves a significant efficiency improvement and a maximum junction temperature reduction compared to the hybrid IGBT/Schottky counterpart. The hybrid IGBT/MOSFET solution achieves a 40% higher power handling capability in the 20-kHz single-phase VSI or 1.5 times higher switching frequency in the 2-kW single-phase VSI than the hybrid IGBT/Schottky solution.

Performance Comparison of Two Hybrid Si/SiC Device Concepts

In this paper, a hybrid switch with the combination of large-current silicon (Si) insulated gate bipolar transistor (IGBT) and small-current silicon carbide (SiC) metal-oxide semiconductor field-effect transistor ( mosfet ) is utilized in a three-phase T-type three-level grid inverter. The hybrid switch can optimize the cost of the system while achieving high efficiency. The relationship between efficiency improvement and cost of the hybrid switch is investigated. Several switching patterns, which can decrease the loss of the small-current SiC mosfet for the hybrid switch, are studied. Different switching patterns for the hybrid switch of the grid inverter are compared based on the inverter efficiency. Finally, a 20 kW three-phase T-type three-level grid inverter prototype with the hybrid switch of large-current Si IGBT and small-current SiC mosfet (1:2.4 SiC/Si current ratio) is built to verify the main results.

Efficiency Improvement of Grid Inverters With Hybrid Devices

In this paper, efficiency comparison of 2- and 3-level inverters based on a 50 kW grid-connected solar inverter is presented. A 3-level Inverter with combination of SiC MOSFET and Si IGBT is proposed. An improved switching pattern is employed to realize the zero-voltage switching (ZVS) operation for Si IGBTs. Therefore, optimal efficiency can be achieved by taking advantage of both Si-IGBT and SiC MOSFET. It shows that utilizing hybrid switches in T-type 3-level grid-connected inverters can achieve the highest efficiency. A 4 kW 3-level single phase inverter is built to verify the analysis.

Efficiency improvement of 2- and 3-level inverters for distributed photovoltaic application using hybrid devices

In this paper, design of a low parasitic inductance T-type SiC-MOS/Si-IGBT hybrid module for PV inverters is studied. Current commutation loops and self- and mutual inductances model of the hybrid module are analyzed. Then stacked substrates structures with vertical power commutation loop to reduce parasitic inductance are identified and compared. Finally, a hybrid module with stacked bond wire substrates structure is built and test results are provided to verify the design.

https://ieeexplore.ieee.org/ielx7/8782709/8932554/09961883.pdf

Design of Low Inductance SiC-MOS/Si-IGBT Hybrid Module for PV Inverters

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Efficiency Improvement of Grid Inverters With Hybrid Devices

Efficiency improvement of 2- and 3-level inverters for distributed photovoltaic application using hybrid devices

Design of Low Inductance SiC-MOS/Si-IGBT Hybrid Module for PV Inverters