Yasuhiro Ishii
Hitachi
19 Papers
381 Citations
Yasuhiro Ishii is an academic researcher from Hitachi. The author has contributed to research in topics: Key generation & Key (cryptography). The author has an hindex of 7, co-authored 19 publications.
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Papers
Patent
File encryption method and file cryptographic system
Masafumi Nozawa,Akinobu Shimada,Nishimura Toshifumi,Katsuharu Kakuse,Tokuhiro Tsukiyama,Kiyoshi Yata,Yasuhiro Ishii,Kazuo Takaragi,Y. Kuba,Fujio Fujita +9 more
- 12 Mar 1991
TL;DR: In this paper, an information processing system having an upper rank apparatus and an external storage device which performs transmission and reception of data between the storage device and the upper-rank apparatus is described.
128
Patent
Cryptographic communication method and system
Kazuo Takaragi,Yasuhiro Ishii,Nakamura Tsutomu +2 more
- 21 Feb 1991
TL;DR: A cryptographic communication method and system for performing cryptographic communication between a host computer and a given one of plural terminals connected to the host computer by way of a communication network by using a data key designated by the given terminal or the host as mentioned in this paper.
74
Patent
Backup switching control system and method
Atuo Kobayashi,Yasuhiro Ishii +1 more
- 10 Jun 1994
TL;DR: In this article, a combination of an operating processor and a backup data processing machine is used to enable backup switching where the backup machine takes over the data processing from the operating processor when a failure occurs in the operating machine.
45
Patent
Multi-processor system and its network
Okada Tetsuhiko,Naoki Hamanaka,Naohiko Irie,Takehisa Hayashi,Tetsuya Mochida,Masabumi Shibata,Youichi Tanaka,Yasuhiro Ishii +7 more
- 12 Nov 1996
TL;DR: In this article, a multi-processor system interconnecting processor units, memory units, and input/output units connected to input and output devices via a crossbar switch having a plurality of ports, the transmitter of each processor unit has a circuit for determining a destination of an access request.
44
Patent
Semiconductor integrated circuit system having function of automatically adjusting output resistance value
Kenichi Ishibashi,Hayashi Takehisa,Goto Tsutomu,Hideki Murayama,Akira Yamagiwa,Yasuhiro Ishii,Naoki Hamanaka,Masabumi Shibata +7 more
- 08 Jul 1998
TL;DR: In this paper, a control apparatus issues an output resistance value adjustment request signal to output resistance adjustment units of the LSIs, and the adjustment units stop the signal transmission and adjust the output resistance values of output circuits in such a manner that the output resist values are matched with a characteristic impedance of a transmission line.
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