A method for introducing impurities includes a step for forming an amorphous layer at a surface of a semiconductor substrate, and a step for forming a shallow impurity-introducing layer at the semiconductor substrate which has been made amorphous, and an apparatus used therefore. Particularly, the step for forming the amorphous layer is a step for irradiating plasma to the surface of the semiconductor substrate, and the step for forming the shallow impurity-introducing layer is a step for introducing impurities into the surface which has been made amorphous.

Method for introducing impurities and apparatus for introducing impurities

A method for forming an impurity-introduced layer is disclosed which at least comprises a step for forming a resist pattern on one major surface of a solid base such as a silicon substrate (S27), a step for introducing impurities into the solid base through plasma doping in the ion mode (S23), a step for removing the resist (S28), a step for cleaning the solid base surface by removing metal contamination and particles (S25a), and a step for performing a heat treatment (S26). The resist removing step (S28) is performed by irradiating the resist with an oxygen plasma (S28a) or by bringing the resist into contact with a mixed solution of sulfuric acid and hydrogen peroxide solution or a mixed solution of NH4OH, H2O2 and H2O. The cleaning step (S25a) is performed by bringing the major surface of the solid base into contact with a mixed solution of sulfuric acid and hydrogen peroxide solution or a mixed solution of NH4OH, H2O2 and H2O. The resist removing step (S28) and the cleaning step (S25a) are performed at the same time by bringing the resist and the major surface of the solid base into contact with a mixed solution of sulfuric acid and hydrogen peroxide solution or a mixed solution of NH4OH, H2O2 and H2O at onece.

Method for forming impurity-introduced layer, method for cleaning object to be processed, apparatus for introducing impurity and method for producing device

In this work, we report on the integration of 30nm gate length CMOS devices fabricated using laser spike annealing (LSA) Considerably improved short channel effects and drive current (+10% Ion at constant Ioff for NMOS) are demonstrated on samples using LSA Excellent IonIoff characteristics (Ion = 940 muA/mum Ioff = 200 muA/mum for NMOS and Ion = 390muA/mum Ioff = 50 nA/mum for PMOS at Vdd = 1 V) are measured that are at the leading edge of the state of the art Moreover, an enhanced dynamic behavior (-6% in ring oscillator delay) and improved characteristics of high density SRAM bit-cells (+24% Icell for the same 1sb) are reported These results demonstrate the potential of LSA in the perspective of 30 nm device integration of a 45 nm bulk CMOS platform

High density and high speed SRAM bit-cells and ring oscillators due to laser annealing for 45nm bulk CMOS

A laser annealing process capable of suppressing a variation in sheet resistance. A surface layer formed shallower than 100 nm in a substrate of semiconductor material is added with impurities. The substrate is irradiated with a laser beam or its harmonic beam emitted from a laser diode pumped to solid-state laser to activate the impurities.

Process for fabricating semiconductor device

A method for introducing impurities comprising a step for forming an amorphous layer on the surface of a semiconductor substrate, and a step for forming a shallow impurity introduction layer on the semiconductor substrate rendered amorphous characterized in that the step for forming the amorphous layer is a step for irradiating the surface of the semiconductor substrate with plasma, and the step for forming a shallow impurity introduction layer is a step for introducing impurities into the surface rendered amorphous.

Method for introducing impurities

In this paper, for the first time, we report the effect of pre-amorphization for the reduction of contact resistance of CoSi/sub 2/-Si using Laser Thermal Process (LTP). Owing to the lower melting point of pre-amorphized Si, we can achieve much lower contact resistance in the lower laser power conditions. And the larger junction leakage current and junction capacitance can be much reduced by combining pre-doping and pre-RTA technique with LTP.

Impact of pre-amorphization for the reduction of contact resistance using laser thermal process

We have investigated in depth the impact of higher carrier activation by laser spike annealing (LSA), and demonstrate that LSA can improve the ion current while suppressing short channel effect in sub-40-nm CMOS devices compared to the conventional spike RTA. A shallower junction depth and shorter SDE overlap length can be achieved for the same SDE sheet resistance by using LSA, and as a result, Vth-rolloff can be improved dramatically. Moreover, the higher carrier activation of LSA produced improvements in ion current of 3%/14% for PMOS/NMOS. We also demonstrate that a 13% improvement in ion can be achieved for PMOS at the same Vth-rolloff.

Performance enhancement in aggressively scaled CMOS devices higher carrier activation with laser spike annealing

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Impact of pre-amorphization for the reduction of contact resistance using laser thermal process

Performance enhancement in aggressively scaled CMOS devices higher carrier activation with laser spike annealing