An implantable medical device (100) for electrically stimulating the heart to beat generally includes a processor (170), a plurality of electrodes (101, 110, 120, 140, 150), a sense amplifier (162, 164), a pulse generator (168), and a heart status monitor The processor can determine when the patient has entered an environment of high electromagnetic interference When this occurs, the processor forces the implantable device into a safe noise mode While in the same noise mode (which preferably continues while the patient is experiencing the electromagnetic interference), the implantable device paces the heart on demand and inhibits pacing during the vulnerable period The processor determines when the vulnerable period is occurring and when the heart needs to be paced by monitoring a status signal from the heart status monitor The heart status monitor preferably includes an impedance measurement circuit, but may include any type of cardiac sensor that can generate a status signal from which the processor can determine the beginning and ending of the vulnerable period

Implantable cardiac stimulator with safe noise mode

Ultrasonic probe devices are provided which are particularly suitable for use as invasive imaging probes such as endocavity probes and endoscopic probes. The probe devices include a dual cross-scanning bi-plane array transducer formed by a pair of orthogonal, intersecting transducer arrays. The probe devices are capable of providing, either simultaneously or alternately, crossing scanning through a single symmetrical scanning axis.

Bi-plane ultrasonic probe

In manufacturing a semiconductor device, static electricity is generated while contact holes are formed in an interlayer insulating film by dry etching. Damage to a pixel region or a driving circuit region due to travel of the static electricity generated is prevented. Gate signal lines are spaced apart from each other above a crystalline semiconductor film. Therefore a first protective circuit is not electrically connected when contact holes are opened in an interlayer insulating film. The static electricity generated during dry etching for opening the contact holes moves from the gate signal line, damages a gate insulating film, passes the crystalline semiconductor film, and again damages the gate insulating film before it reaches the gate signal line. As the static electricity generated during the dry etching damages the first protective circuit, the energy of the static electricity is reduced until it loses the capacity of damaging a driving circuit TFT. The driving circuit TFT is thus prevented from suffering electrostatic discharge damage.

Semiconductor Device and Method of Manufacturing the Same

A method and apparatus of making high energy implanted photodiode that is self aligned with the transfer gate, the high energy implant is defined by providing a substrate, or well, of a first conductivity type, defining a charge coupled device within the substrate, or well, such that gate electrode layers are allowed to exist over areas to contain photodiodes during construction of the charge coupled device, patterning a masking layer to block high energy implants such that openings in the masking layer are formed over the areas of the photodiodes, anisotropically etching down through the gate electrode over the photodiodes to the gate dielectric material, implanting photodiodes with high-energy ions of a second conductivity type opposite the first conductivity type and creating a pinned photodiode by employing a shallow implant of the first conductivity type. The apparatus made by this method yields a photodiode employing high energy ions to form the P/N junction that is self aligned with the transfer gate.

Method of making self-aligned, high-enegry implanted photodiode for solid-state image sensors

A variable-capacitance diode element is disclosed which comprises a semiconductor substrate of a first conductivity type having an epitaxial layer of the first conductivity type provided on a main surface portion thereof, said epitaxial layer having a higher resistivity than that of said semiconductor substrate; a first diffusion layer of the first conductivity type diffused in said epitaxial layer and having a lower resistivity than that of said epitaxial layer; a second diffusion layer of a second conductivity type surrounded by said first diffusion layer and having a lower resistivity than that of said first diffusion layer; and a third diffusion layer of the second conductivity type of a small diffusion length covering an exposed portion of a major surface of said first diffusion layer and an exposed portion of a major surface of said second diffusion layer. With such construction, the capacitance variation range of the diode element is widened, and the high-frequency serial resistance R s is reduced, so that the quality factor Q is enhanced.

Variable capacitance diode element having wide capacitance variation range

An improved monolithic, temperature compensated voltage-reference diode is realized by creating a tub of epitaxial semiconductor material in a substrate of opposite conductivity type and creating a voltage reference junction at a surface of the tub. The junction between the tub and the substrate forms the forward-biased, temperature compensating junction of the device. The dopant concentration is varied during growth of the epitaxial material to provide a relatively low resistivity at the voltage-reference junction and a higher resistivity at the temperature compensating junction. The method described offers significant improvement over prior methods of manufacturing such devices in the area of cost and reliability.

Monolithic temperature compensated voltage-reference diode and method of its manufacture

Zener diodes and other semiconductor junctions having very low noise characteristics and improved yield may be obtained by first ion implanting a suitable impurity into a substrate wafer, and then forming the p-n junction using a very rapid thermal activation and annealing process. For p-n junctions formed with boron ( 11 B) implanted into n-type silicon to a peak concentration exceeding 10 20 atoms/cm 3 , the rapid activation process comprises heating from about room temperature to about 1150° C. in 12-30 seconds, and then cooling back below 1000 degrees C. in less than 5 seconds. Noise voltages measured on devices formed using the invented process were typically much lower and more narrowly grouped than on devices of the prior art. Dynamic impedance was also slightly reduced.

Method for producing low noise, high grade constant semiconductor junctions

An improved monolithic, temperature compensated voltage- reference diode is realized by creating a tub (17) of epitaxial semiconductor material in a substrate of opposite conductivity type and creating a voltage reference junction (26) at a surface of the tub. The junction (18) between the tub and the substrate forms the forward-biased, temperature compensating junction of the device. The dopant concentration is varied during growth of the epitaxial material to provide a relatively low resistivity at the voltage-reference junction and a higher resistivity at the temperature compensating junction. The method described offers significant improvement over prior methods of manufacturing such devices in the area of cost and reliability.

Monolithic temperature compensated voltage-reference diode and method for its manufacture

Zener diodes and other semiconductor junctions having very low noise characteristics and improved yield may be obtained by first ion implanting a suitable impurity into a substrate wafer, and then forming the p-n junction using a very rapid thermal activation and annealing process. For p-n junctions formed with boron ("B) implanted into n-type silicon to a peak concentration exceeding 10 20 atoms/cm 3 , the rapid activation process comprises heating from about room temperature to about 1150°C in 12-30 seconds, and then cooling back below 1000 degrees C in less than 5 seconds. Noise voltages measured on devices formed using the invented process were typically much lower and more narrowly grouped than on devices of the prior art. Dynamic impedance was also slightly reduced.

Low noise zener diode means and method

Manufacture process in a low noise semiconductor and zener diode

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