We made and characterized an X-ray detector on a 25- $\mu \text{m}$ -thick plastic substrate that is capable of medical-grade performance. As an indirect conversion flat panel detector, it combined a standard scintillator with an organic photodetector (OPD) layer and oxide thin-film transistor backplane. Using solution-processed organic bulk heterojunction photodiode rather than the usual amorphous silicon, process temperature is reduced to be compatible with plastic film substrates, and a number of costly lithography steps are eliminated, opening the door to lower production costs. With dark currents as low as 1 pA/mm $^{2}$ and sensitivity of 0.2 A/W the OPD also meets functional requirements: the proof-of-concept detector delivers high-resolution, dynamic images at 10 frames/s, and 200 pixels/in using X-ray doses as low as $3~\mu $ Gy/frame.

X-Ray Detector-on-Plastic With High Sensitivity Using Low Cost, Solution-Processed Organic Photodiodes

Large-area electronics for applications in environments with radioactive contamination or medical X-ray detectors require materials and devices resistant to continuous ionizing radiation exposure. Here the superior X-ray radiation hardness of oxide thin film transistors (TFTs) based on gallium-indium-zinc oxide is demonstrated, when compared to organic ones. In the experiments both TFTs are subjected to X-ray radiation and their performances are monitored as a function of total ionizing dose. Flexible oxide TFTs maintain a constant mobility of 10 cm2 V−1 s−1 even after exposure to doses of 410 krad(SiO2), whereas organic TFTs lose 55% of their transport performance. The exceptional resistance of oxide semiconductors ionization damage is attributed to their intrinsic properties such as independence of transport on long-range order and large heat of formation.

Radiation-Tolerant Flexible Large-Area Electronics Based on Oxide Semiconductors

Radiation damage effects on zinc oxide (ZnO) based semiconductor devices– a review

We report effects for up to 100 Mrad ( ${{\rm SiO}_2}$ ) gamma-ray exposure on polycrystalline ZnO thin film transistors (TFTs) deposited by two different techniques. The radiation related TFT changes, either with or without electrical bias during irradiation, are primarily a negative ${{\rm V}_{\rm ON}}$ shift and a smaller ${{\rm V}_{\rm T}}$ shift ( $\Delta {{\rm V}_{\rm ON}}\sim - 2.5~\hbox{V}$ and $\Delta {{\rm V}_{\rm T}}\sim - 1.5~\hbox{V}$ for 100 Mrad ( ${{\rm SiO}_2}$ ) exposure). Field-effect mobility remains nearly unchanged. Both, ${{\rm V}_{\rm ON}}$ and ${{\rm V}_{\rm T}}$ shifts are nearly completely removed by annealing at $200^\circ {\rm C}$ for 1 minute and some recovery is seen even at room temperature. We find that our ZnO TFTs are insensitive to electrical bias during irradiation; that is, unbiased measurements are useful worst case test results. To the best of our knowledge, these are the most radiation-hard thin film transistors reported to date.

Radiation-Hard ZnO Thin Film Transistors

Effects of proton beam irradiation on the physical and chemical properties of IGTO thin films with different thicknesses for thin-film transistor applications

The invention provides a single-particle transient pulse width expanding method and a single-particle transient pulse width expanding circuit. The single-particle transient pulse width expanding method comprises the following steps of separating a single-particle transient pulse signal into a pulse initiating signal and a pulse ending signal; performing phase delay processing on the pulse ending signal; and combining the pulse initiating signal and the pulse ending signal subjected to phase delay processing. The single-particle transient pulse width expanding method is based on a phase delay theory for signals in a logic gate, and because the phase delay of the signals in the logic gate are larger, the width increment after an input pulse passes an expanding module is large, and the expanded pulse is easily captured or processed by a subsequent circuit.

Single-particle transient pulse width expanding method and circuit

Solder joints on the Printed-Circuit board (PCB) serve as mechanical and electrical connections. Their function maybe simple, but the reliability of the solder joints may affect the entire device or system. They are usually the weak links when the electronic products are exposed to a variety of load conditions from their operation and storage, such as temperature cycling, vibration, shock and humidity. One of the most important parameters of solder joints is electrical stability. The resistance or impedance will rise as the fracture spreads through the solder joints. The reliability of solder joints is often determined through continuous DC resistance measurement, but it not very sensitive. In recent years, Time Domain Reflectometry (TDR) technique has been found to be a better alternative that are required for monitoring the degradation of interconnects. At high frequencies, signal propagation is concentrated at the surface of interconnects, a phenomenon known as the skin effect. Degradation of interconnects, such as cracking of solder joints due to fatigue or shock loading, also usually initiates at the surface and propagates inward. Therefore, even a small crack at the surface of a solder joint may change RF impedance. A physical crack initiated at the surface of the solder joints results in the increase of RF impedance. Thus, the crack length should be correlative with RF impedance or Reflection Coefficient, and the failure time of the solder joint could be estimated in view of electronic theory and the theory of fracture. A mathematic model was proposed to predict the relationship between the time domain reflection coefficient of solder joint and the crack length in it.

Solder joint degradation analysis using Time Domain Reflectometry

The invention discloses an infrared focal plane array chip startup and shutdown cycle life testing method and device The method comprises the following steps of selecting a plurality of infrared focal plane array chips as samples, and conducting statistics on initial blind pixel rates of the samples; conducting startup and shutdown cycle life tests with preset number of times, and conducting statistics on final blind pixel rates on samples after the tests are finished; according to the initial blind pixel rates and the final blind pixel rates, by means of unilateral estimation, calculating an upper limit of the blind pixel rates of the infrared focal plane array chips under the preset confidence level; according to the upper limit of the blind pixel rates and the failure criteria of the blind pixel rates corresponding to the infrared focal plane array chips, determining the startup and shutdown cycle life of the infrared focal plane array chips According to the infrared focal plane array chip startup and shutdown cycle life testing method and device, the number of the needed samples is small, the test cycle is short, the engineering construction cost is low, the method has scientificity and reasonability, and the purpose of evaluation of the IRFPA chip startup and shutdown cycle life is achieved

Infrared focal plane array chip startup and shutdown cycle life testing method and device

The failure rate for NMOS devices is modelled by sum-of-failure-rate, i.e., the one for HCI mechanism and the one for TDDB failure mechanism. The least squares method is used to estimate the unknown parameters in HCI failure rate model and TDDB failure rate model, respectively. The hypothesis tests show that the regression model for HCI (TDDB) has good fitness and high significance. These results are verified by a numerical example.

Failure rate calculation for NMOS devices under multiple failure mechanisms

The invention discloses a bipolar device enhanced low dose rate sensitivity (ELDRS) effect test preprocessing system and a bipolar device ELDRS effect test preprocessing method. The bipolar device ELDRS effect test preprocessing system comprises a vacuum pump, a pressure measuring device, a temperature control device and a hydrogen supply device, all of which are communicated in sequence. A first regulating valve is arranged between the vacuum pump and the pressure measuring device. A second regulating valve is arranged between the temperature control device and the hydrogen supply device. The temperature control device comprises a sealing cover and a body capable of accommodating a bipolar device, the sealing cover is matched with an opening of the body, and the body is communicated with the pressure measuring device and the hydrogen supply device. By adopting the system, an oxide layer or silicon interface of a bipolar device can be effectively doped with hydrogen molecules. By adopting the bipolar device ELDRS effect test preprocessing method, the concentration of hydrogen molecules doped at the oxide layer or silicon interface of the bipolar device can reach a predetermined concentration meeting the test requirement.

Bipolar device enhanced low dose rate sensitivity effect test preprocessing system and bipolar device enhanced low dose rate sensitivity effect test preprocessing method

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