The invention discloses an Intel CPU-based parallel Turbo decoding method comprising the following steps: (1) Turbo decoding operation is accelerated via a single instruction multiple data stream instruction; in the single instruction multiple data stream instruction, 128 bits are distributed to each code block, the number of parallel code blocks is determined according to an instruction bit width supported by a CPU, pertinent codes are written, and internal operation of each code block is enabled to be as same as single code block coding operation; (2) in the single instruction multiple data stream instruction, a forward direction state measurement value alpha and a reverse direction state measurement value beta are calculated at the same time in a log-likelihood ratio mode, and two intermediate vectors respectively having a positive state and a negative state are generated in calculating processes; when a time sequence is k, a sequence number of alpha is set as k, and a sequence number of beta is code length N-1-K. When k reaches or exceeds a half of N, alpha and beta of a time sequence N-1-K are loaded into vectors and positions are switched, the vectors and the two intermediate vectors in the time sequence k are subjected to calculating operation, and log-likelihood ratio information can be obtained and output.

Intel CPU-based parallel Turbo decoding method

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Intel CPU-based parallel Turbo decoding method