Power density of power electronic converters in different applications has roughly doubled every 10 years since 1970. Behind this trajectory was the continuous advancement of power semiconductor device technology allowing an increase of converter switching frequencies by a factor of 10 every decade. However, today's cooling concepts, and passive components and wire bond interconnection technologies could be major barriers for a continuation of this trend. For identifying and quantifying such technological barriers this paper investigates the volume of the cooling system and of the main passive components for the basic forms of power electronics energy conversion in dependency of the switching frequency and determines switching frequencies minimizing the total volume. The analysis is for 5 kW rated output power, high performance air cooling, advanced power semiconductors, and single systems in all cases. A power density limit of 28 kW/dm3@300 kHz is calculated for an isolated DC-DC converter considering only transformer, output inductor and heat sink volume. For single-phase AC-DC conversion a general limit of 35 kW/dm3 results from the DC link capacitor required for buffering the power fluctuating with twice the mains frequency. For a three-phase unity power factor PWM rectifier the limit is 45 kW/dm3@810 kHz just taking into account EMI filter and cooling system. For the sparse matrix converter the limiting components are the input EMI filter and the common mode output inductor; the power density limit is 71 kW/dm3@50 kHz when not considering the cooling system. The calculated power density limits highlight the major importance of broadening the scope of research in power electronics from traditional areas like converter topologies, and modulation and control concepts to cooling systems, high frequency electromagnetics, interconnection technology, multi-functional integration, packaging and multi-domain modeling and simulation to ensure further advancement of the field along the power density trajectory.

https://www.hpe.ee.ethz.ch/uploads/tx_ethpublications/IEEJ_PowerDensity_Paper_FinalRevised_03.pdf

PWM Converter Power Density Barriers

Power module packaging technologies have been experiencing extensive changes as the novel silicon carbide (SiC) power devices with superior performance become commercially available. This article presents an overview of power module packaging technologies in this transition, with an emphasis on the challenges that current standard packaging face, requirements that future power module packaging needs to fulfill, and recent advances on packaging technologies. The standard power module structure, which is a widely used current practice to package SiC devices, is reviewed, and the reasons why novel packaging technologies should be developed are described in this article. The packaging challenges associated with high-speed switching, thermal management, high-temperature operation, and high-voltage isolation are explained in detail. Recent advances on technologies, which try to address the limitations of standard packaging, both in packaging elements and package structure are summarized. The trend toward novel soft-switching power converters gave rise to problems regarding package designs of unconventional module configuration. Potential applications areas, such as aerospace applications, introduce low-temperature challenges to SiC packaging. Key issues in these emerging areas are highlighted.

A Review of SiC Power Module Packaging Technologies: Challenges, Advances, and Emerging Issues

https://www.jstage.jst.go.jp/article/ieejias/128/4/128_4_468/_pdf

The paper examines the status of power electronics technology by looking at eight constituent technologies (power switch technology, passive components, power switching network technology, packaging technology, environmental impact technology, cooling technology, manufacturing technology, and converter control technology). The present trends are then discussed from the point of view of some of these that can be considered internal drivers, as well as from the viewpoint of those that are external drivers. Packaging as a central driver is evaluated and the necessity for a paradigm shift in power electronics technology identified. Future possibilities in terms of electromagnetic integration of passives and of integrated power electronic modules (IPEMs) are discussed.

Power electronics technology at the dawn of the new millenium-status and future

A new technique for the packaging of IGBT modules has been developed. The components are sandwiched between two direct bond copper (DBC) substrates with aluminum nitride. Wire bonds are replaced with flip chip solder bumps, which allows cooling of components on both sides. Microchannel heat sinks are directly integrated in the package to decrease the thermal resistance of the module. Thus, a very compact module with high thermal performance is obtained. A prototype with two insulated gate bipolar transistors (IGBTs) and four diodes associated in parallel was realized and tested. In this paper, the innovative packaging technique is described, and results of thermal tests are presented.

Double-sided cooling for high power IGBT modules using flip chip technology

The improved performance of high power circuits are achieved using an innovative embedded chip MCM technology for power applications. This power package development is based upon an extension of a thin film MCM process which replaces the parasitic limiting wirebonds of hybrid power circuits and the package limiting SMT power circuits with low impedance, multilayer metal interconnects. This paper describes the thin film power overlay technology and how this package structure improves electrical, thermal, and reliability performance. >

High frequency, low cost, power packaging using thin film power overlay technology

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High frequency, low cost, power packaging using thin film power overlay technology