V. Gupta
Texas Instruments
5 Papers
211 Citations
V. Gupta is an academic researcher from Texas Instruments. The author has contributed to research in topics: Backplane & Transceiver. The author has an hindex of 4, co-authored 5 publications.
Chat about Author
Papers
A 6.25-Gb/s binary transceiver in 0.13-/spl mu/m CMOS for serial data transmission across high loss legacy backplane channels
Robert Floyd Payne,Paul E. Landman,Bhavesh G. Bhakta,Srinath Ramaswamy,Song Wu,John Powers,Mustafa Ulvi Erdogan,Ah-Lyan Yee,R. Gu,Lin Wu,Yiqun Xie,B. Parthasarathy,Keith Brouse,W. Mohammed,K. Heragu,V. Gupta,L. Dyson,Wai Lee +17 more
TL;DR: In this article, a transceiver capable of 6.25-Gb/s data transmission across legacy communications equipment backplanes is described, which can compensate up to 20 dB of channel loss to remove intersymbol interference.
131
A 6.25Gb/s binary adaptive DFE with first post-cursor tap cancellation for serial backplane communications
Robert Floyd Payne,Bhavesh G. Bhakta,Srinath Ramaswamy,Song Wu,John Powers,Paul E. Landman,Ulvi Erdogan,Ah-Lyan Yee,R. Gu,Lin Wu,Yiqun Xie,B. Parthasarathy,Keith Brouse,W. Mohammed,K. Heragu,V. Gupta,L. Dyson,Wai Lee +17 more
- 29 Aug 2005
TL;DR: A 6.25 Gb/s serial receiver with a 4-tap adaptive DFE is implemented in a 0.13 /spl mu/m 7LM CMOS process, enabling recovery of a data eye fully closed from channel losses and crosstalk.
52
A 62Gb/s backplane interconnect ASIC based on 3.1Gb/s serial-link technology
Paul E. Landman,Ah-Lyan Yee,R. Gu,B. Parthasarathy,V. Gupta,Srinath Ramaswamy,L. Dyson,P. Bosshart,J. Reynolds,M. Frannhagen,P. Fremrot,S. Johansson,K. Lewis,Wai Lee +13 more
- 07 Aug 2002
TL;DR: In this article, a backplane interconnect ASIC with 62 Gb/s full-duplex aggregate throughput uses 3.1 Gb-s serial link technology organized as 20 bidirectional channels to realize bandwidth.
21
A transmit architecture with 4-tap feedforward equalization for 6.25/12.5Gb/s serial backplane communications
Paul E. Landman,Keith Brouse,V. Gupta,Song Wu,Robert Floyd Payne,Ulvi Erdogan,R. Gu,Ah-Lyan Yee,B. Parthasarathy,Srinath Ramaswamy,Bhavesh G. Bhakta,W. Mohammed,John Powers,Yiqun Xie,Lin Wu,L. Dyson,K. Heragu,Wai Lee +17 more
- 29 Aug 2005
TL;DR: In this article, a programmable 4-tap feed-forward equalizer for 6.25 to 12.5 Gb/s serial communications through lossy channels is described.
14
Programmable termination for CML I/O's in high speed CMOS transceivers
Srinath Ramaswamy,V. Gupta,Paul E. Landman,B. Parthasarathy,R. Gu,Ah-Lyan Yee,L. Dyson,Song Wu,Wai Lee +8 more
- 13 Jun 2002
TL;DR: The transmitter and receiver front-end circuits that are designed to operate with dual termination voltage supplies are described and receiver characterization, ESD protection and system level power up issues related to gate-oxide and electro-migration reliability are discussed.
1