Big data applications have become increasingly popular with the appearance of cloud computing and green computing. Therefore, internet service providers (ISPs) need to build data centers for data storage and data processing under the cloud service pattern. However, data centers often consume a significant amount of energy and lead to pollutant emissions. In recent years, the high energy consumption and environmental pollution of data centers have become a pressing issue. This paper reviews the progress of energy-saving technologies in high-performance computing, energy conservation technologies for computer rooms and renewable energy applications during the construction and operation of data centers. From multiple perspectives of energy consumption, cost reduction, and environment protection, a comprehensive set of strategies are proposed to maximize data centers’ efficiency and minimize the environmental impact. This paper also provides energy-saving trends for data centers in the future.

Optimizing energy consumption for data centers

This paper presents a cycle-accurate and configurable simulator that estimates the power consumed by an embedded system. The simulator accepts as input a structural system architecture description, at a level of abstraction that can be configured by the user. The simulator has been used to study the power dissipation of different micro-architectures of a Java microcontroller while executing several applications. Thanks to the cycle-driven behavior and the structural system description, the simulator is both flexible and accurate, and it may also be fast, depending on the desired level of abstraction. It represents a valuable support in a design space exploration methodology, allowing a power consumption evaluation that can be applied to any processor and system architecture at an early design stage.

CACO-PS: a general purpose cycle-accurate configurable power simulator

A proposed modular framework for assessing power consumption of embedded systems early in the design cycle can be extended to any performance metric and uses a high level of abstraction, leading to a faster execution time. Experimental results indicate that the approach is within 20 percent of gate-level estimation and executes three orders of magnitude faster.

A new framework for power estimation of embedded systems

Modern demand for energy-efficient computation has spurred research at all levels of the stack, from devices to microarchitecture, operating systems, compilers, and languages. Unfortunately, this breadth has resulted in a disjointed space, with technologies at different levels of the system stack rarely compared, let alone coordinated. This work begins to remedy the problem, conducting an experimental survey of the present state of energy management across the stack. Focusing on settings that are exposed to software, we measure the total energy, average power, and execution time of 41 benchmark applications in 220 configurations, across a total of 200,000 program executions. Some of the more important findings of the survey include that effective parallelization and compiler optimizations have the potential to save far more energy than Linux's frequency tuning algorithms; that certain non-complementary energy strategies can undercut each other's savings by half when combined; and that while the power impacts of most strategies remain constant across applications, the runtime impacts vary, resulting in inconsistent energy impacts.

/pdf/an-experimental-survey-of-energy-management-across-the-stack-2z6dwtp3hc.pdf

An experimental survey of energy management across the stack

This chapter presents a low power architecture of a Java processor. We show that the use of techniques like pipeline and the implementation of the stack in a register bank instead of using the main memory allow aggressive reduction of power dissipation, with a very small area overhead. Besides, thanks to the forwarding technique and to the specific stack machine organization, huge power savings can be obtained when applying this technique to a pipelined implementation of the architecture. Several examples of embedded applications are used to show the power savings obtained through the architecture optimization

Low Power Java Processor for Embedded Applications.

The topic of reducing power dissipation in embedded systems has received considerable attention in the recent years. Techniques have been reported to minimize energy dissipation through (a) selection of better algorithms for the application e.g. DSP algorithms that require fewer number of operations to perform a task such as filtering (b) minimizing state transitions and switching activity in the hardware implementation, and (c) reducing the operating supply voltage by changing the architecture of the system e.g. through the use of pipelining. However, power dissipation is often neglected when developing the software for embedded systems. Software optimization techniques can be used to reduce the cost, size, and power dissipation in embedded systems without adding to system overheads. In this paper, we view the power dissipation as consisting of two parts, the power dissipated in the application-specific integrated circuits (hardware power) and the power dissipated by the CPU, memory and associated busses (software power). We provide a trace-based technique to estimate software power and study the effect of different code optimization techniques on software power, performance and code size.

Software power optimizations in an embedded system

Handle everyday research tasks with reliable, citation-backed results

Your personal Research Agent to handle research tasks with citation-backed results

Popular Tasks used by Researchers

How can I help with your research?

Meet SciSpace

Get more enhanced response by uploading the PDFs you want me to reference.

No relevant PDFs in your library

SciSpace is the AI research assistant for academics. Run systematic literature reviews on 280M+ papers, and write papers with cited sources. Trusted by 1M+ students, PhDs & researchers.

SciSpace | AI for Research

Analyze PDFs

Code & Manuscripts

Funding & Grants

Literature & Patents

Medical & Clinical Data

Systematic Review

Visualize & Present

Web & Data

Build a Google Scholar-like website for your research.

Build a website

Create charts and images for your research

Create a Chart

Write a paper for submission to a journal

Draft a manuscript

Patent Search

Design eye-catching scientific posters in minutes.

Scientific Poster Generation

Systematic Literature Review

One task is running at the moment. Your messages will be shown right after.

Drag and drop or click here to browse

Loved by <highlight>1 million+</highlight> researchers

Extract a list of specific topics and their sources from unstructured text

Topics

Compare and analyze relevant papers that matches with your search

Papers

Get insights from PDFs and bookmarked papers from your library

My library

Recent searches

Try searching for:

Catch AI-generated content in scholarly and non-scholarly content

{ai} Detector

Ai Writer

Get PDF Summaries, highlighted text explanations 

Chat with PDF

Effortlessly create in-text citations and bibliographies in APA and 2,500 other formats

Citation generator

Get explanations, summaries, and answers on academic papers

Ease up your research workflow with {scispace}'s cohort of exciting AI tools

Elevate your academic writing skills and convey your ideas the way you want

Paraphraser

Explore our range of reading and writing tools

Your file is being prepared and should be ready in a few minutes. If it's a large file, it might take a bit longer. You can close this window, and we'll email you the file when it's done.

You have reached a maximum limit of <strong>{limit}</strong> columns in the table. Remove at least <strong>1</strong> column to add or create another one.

V. Dalal

Author Tools

Chat about Author

Papers

Software power optimizations in an embedded system