High-frequency (HF) modeling of MOSFETs for radio-frequency (RF) integrated circuit (IC) design is discussed Modeling of the intrinsic device and the extrinsic components is discussed by accounting for important physical effects at both dc and HF The concepts of equivalent circuits representing both intrinsic and extrinsic components in a MOSFET are analyzed to obtain a physics-based RF model The procedures of the HF model parameter extraction are also developed A subcircuit RF model based on the discussed approaches can be developed with good model accuracy Further, noise modeling is discussed by analyzing the theoretical and experimental results in HF noise modeling Analytical calculation of the noise sources has been discussed to understand the noise characteristics, including induced gate noise The distortion behavior of MOSFET and modeling are also discussed The fact that a MOSFET has much higher "low-frequency limit" is useful for designers and modelers to validate the distortion of a MOSFET model for RF application An RF model could well predict the distortion behavior of MOSFETs if it can accurately describe both dc and ac small-signal characteristics with proper parameter extraction

MOSFET modeling for RF IC design

The impedance errors remaining after conventional de-embedding for a high-speed transistor and a single-loop inductor test structure are investigated. A new de-embedding strategy using a physics-based lumped-element model for the test-structure parasitics calibrated on the frequency-dependent "open" and "short" dummy impedances is described, which reduces the experimental uncertainty on the de-embedded figures of merit. Using this new "calibrated lumped-element" de-embedding technique, we have been able to increase the "worst-case" values for the quality factor Q of a 0.6-nH 10-GHz single-loop inductor from 15 to 20 and for the f/sub max/ of a high-speed SiGe bipolar transistor from 80 to 110 GHz. The de-embedding technique presented here is of great importance to develop confidence in on-wafer S-parameter measurements taken at ever increasing microwave frequencies.

A calibrated lumped-element de-embedding technique for on-wafer RF characterization of high-quality inductors and high-speed transistors

In this paper, a robust micromachined spiral inductor with a cross-shaped sandwich membrane support is proposed and fabricated with fully CMOS compatible post-processes for radio frequency integrated circuit (RFIC) applications. Using the incorporation of a sandwich dielectric membrane (0.7 /spl mu/m SiO/sub 2//0.7 /spl mu/m Si/sub 3/N/sub 4//0.7 /spl mu/m TEOS) to enhance the structure rigidity, the inductor can have better signal stability. In comparison, the new design of a /spl sim/5-nH micromachined inductor can have 45% less inductance variation than the one without the dielectric support while both devices are operated with 10 m/s/sup 2/ acceleration. Meanwhile, using a cross shape instead of blanket membrane can also effectively eliminate the inductance variation induced by the working temperature change (20/spl deg/C to 75/spl deg/C). The measurement results show the robust inductor can have similar electrical performance to the as-fabricated freely suspended inductor, which has five times Q (quality factor) improvement than the inductor without the substrate removal. It is our belief that the new micromachined inductors can have not only high-Q performance but also better signal stability suitable for wide-range RFIC applications.

https://ir.nctu.edu.tw:443/bitstream/11536/13514/1/000230123100028.pdf

A robust high-Q micromachined RF inductor for RFIC applications

The present paper proposes the simple deembedding method for 110-GHz on-wafer S-parameter measurements. While conventional de-embedding methods require two or more dummy patterns, our method only uses a through pattern and can perform accurate de-embedding up to 110 GHz. Differences among the proposed method and previous through-only de-embedding methods are that our method is available for various device under tests and higher frequencies.

A simple through-only de-embedding method for on-wafer S-parameter measurements up to 110 GHz

This paper introduces a shielding technique for use with microwave on-wafer device characterization. This results in a shield-based test fixture, which offers many advantages compared to conventional structures. Among others, the test fixture offers full scalability and very low cost, high measuring accuracy, mitigation of leakage problems associated with lossy substrates, and a large measuring realism. The performance of the shield-based method is demonstrated with measurements on test structures fabricated in low-cost silicon processes.

Shield-based microwave on-wafer device measurements

In this paper, a de-embedding method is proposed for conducting accurate on-wafer device measurements in the gi- gahertz range. The method addresses issues of substrate coupling and contact effects and is therefore suitable for measurements with lossy technologies such as CMOS. The method assumes a probe-tip two-port calibration performed with well-known techniques and impedance substrates. By employing a physical interpretation of the test-fixture, the method alleviates a number of known prob- lems with common de-embedding procedures. Four distinct math- ematical steps are suggested to de-embed parasitics for the test-fix- ture to give an accurate measurement of the device under test. By introducing a simple compensation factor for in-fixture stan- dard imperfections, the proposed method allows large devices to be measured with high accuracy. The applicability of the method is demonstrated with measurements up to 12 GHz.

A Four-Step Method for De-Embedding Gigahertz

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A Four-Step Method for De-Embedding Gigahertz