http://www.eecs.ucf.edu/~dcm/Teaching/COT4810-Spring2011/Literature/SensorNetworksSurvey.pdf

Wireless sensor networks: a survey

This article discusses the challenges in computer systems research posed by the emerging field of pervasive computing. It first examines the relationship of this new field to its predecessors: distributed systems and mobile computing. It then identifies four new research thrusts: effective use of smart spaces, invisibility, localized scalability, and masking uneven conditioning. Next, it sketches a couple of hypothetical pervasive computing scenarios, and uses them to identify key capabilities missing from today's systems. The article closes with a discussion of the research necessary to develop these capabilities.

/pdf/pervasive-computing-vision-and-challenges-8dv8bu4mg9.pdf

Pervasive computing: vision and challenges

High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper reviews various transistor intrinsic leakage mechanisms, including weak inversion, drain-induced barrier lowering, gate-induced drain leakage, and gate oxide tunneling. Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices. Finally, the paper explores different circuit techniques to reduce the leakage power consumption.

Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits

This article describes architectural and algorithmic approaches that designers can use to enhance the energy awareness of wireless sensor networks. The article starts off with an analysis of the power consumption characteristics of typical sensor node architectures and identifies the various factors that affect system lifetime. We then present a suite of techniques that perform aggressive energy optimization while targeting all stages of sensor network design, from individual nodes to the entire network. Maximizing network lifetime requires the use of a well-structured design methodology, which enables energy-aware design and operation of all aspects of the sensor network, from the underlying hardware platform to the application software and network protocols. Adopting such a holistic approach ensures that energy awareness is incorporated not only into individual sensor nodes but also into groups of communicating nodes and the entire sensor network. By following an energy-aware design methodology based on techniques such as in this article, designers can enhance network lifetime by orders of magnitude.

/pdf/energy-aware-wireless-microsensor-networks-34nqlav6jf.pdf

Energy-aware wireless microsensor networks

In recent years, there has been a rapid and wide spread of non-traditional computing platforms, especially mobile and portable computing devices. As applications become increasingly sophisticated and processing power increases, the most serious limitation on these devices is the available battery life. Dynamic Voltage Scaling (DVS) has been a key technique in exploiting the hardware characteristics of processors to reduce energy dissipation by lowering the supply voltage and operating frequency. The DVS algorithms are shown to be able to make dramatic energy savings while providing the necessary peak computation power in general-purpose systems. However, for a large class of applications in embedded real-time systems like cellular phones and camcorders, the variable operating frequency interferes with their deadline guarantee mechanisms, and DVS in this context, despite its growing importance, is largely overlooked/under-developed. To provide real-time guarantees, DVS must consider deadlines and periodicity of real-time tasks, requiring integration with the real-time scheduler. In this paper, we present a class of novel algorithms called real-time DVS (RT-DVS) that modify the OS's real-time scheduler and task management service to provide significant energy savings while maintaining real-time deadline guarantees. We show through simulations and a working prototype implementation that these RT-DVS algorithms closely approach the theoretical lower bound on energy consumption, and can easily reduce energy consumption 20% to 40% in an embedded real-time system.

/pdf/real-time-dynamic-voltage-scaling-for-low-power-embedded-39fxxz5wqc.pdf

Real-time dynamic voltage scaling for low-power embedded operating systems

This paper describes the design of a low-power microprocessor system that can run between 8Mhz at 1.1V and 100MHz at 3.3V. The ramifications of Dynamic Voltage Scaling, which allows the processor to dynamically alter its operating voltage at run-time, will be presented along with a description of the system design and an approach to benchmarking. In addition, a more in-depth discussion of the cache memory system will be

/pdf/dynamic-voltage-scaling-and-the-design-of-a-low-power-460ijp266i.pdf

Dynamic Voltage Scaling and the Design of a Low-Power Microprocessor System

The architecture of a device that is optimized for wireless information access and display of multimedia data is substantially different than configurations designed for portable stand-alone operation. The requirements to reduce the weight and energy consumption are the same, but the availability of the wireless link, which is needed for the information access, allows utilization of remote resources. A limiting case is when the only computation that is provided in the portable terminal supports the wireless links or the I/O interfaces, and it is this extreme position that is explored in the InfoPad terminal design. The architecture of the InfoPad terminal, therefore, can be viewed as essentially a switch which connects multimedia data sources in the supporting wired network to appropriate InfoPad output devices (e.g., video display), and connects InfoPad input devices to remote processing (e.g., speech recognizer server) in the backbone network.

The InfoPad multimedia terminal: a portable device for wireless information access

The InfoPad Multimedia Terminal: A Portable Device for Wireless Information Access Manuscript received 8 Apr. 1997, For information on obtaining reprints of this article, please send e-mail to: tc@computer.org, and reference IEEECS Log Number 104806

The InfoPad project explores the infrastructure and devices required for portable wireless access to the national information infrastructure. The InfoPad model emphasizes high-bandwidth wireless connectivity and moves the computing power of the portable device into the backbone network, where we can provide not only full internet access, but increased computing power as well. By concentrating on I/O for the pad we reduce its cost, weight and power requirements, and increase the effective bandwidth through the greater error tolerance of I/O traffic such as video. We describe the InfoPad model, its infrastructure, and the results of the first prototype. This prototype proved the feasibility of the basic model and developed key technologies such as low-power design methodology and protocols for wireless connections. We also discuss the next generation InfoPad and our future plans.

Design of wireless portable systems

The near future will bring the fusion of four rapidly evolving technologies: high speed networking and associated services, wireless communications, scaled integrated circuit technology, and multimedia-based applications. These new technologies will enable the access of multimedia data from network servers at any time and any place by light weight, low cost wireless terminals.

Research challenges in wireless multimedia

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