Tongguang Yu
Pennsylvania State University
5 Papers
2 Citations
Tongguang Yu is an academic researcher from Pennsylvania State University. The author has contributed to research in topics: Computer science & Inverter. The author has co-authored 2 publications.
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Papers
Overview of Ferroelectric Memory Devices and Reliability Aware Design Optimization
Shan Deng,Zijian Zhao,Santosh K. Kurinec,Kai Ni,Yi Xiao,Tongguang Yu,Vijaykrishnan Narayanan +6 more
- 22 Jun 2021
TL;DR: In this paper, the authors compare the design guidelines for three different ferroelectric memory devices, namely, the Ferroelectric FET (FeFET), the FET-based random access memory (FeRAM), and the tunnel junction (FTJ) for high performance and energy-efficient embedded nonvolatile memories.
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•Posted Content
Hardware Functional Obfuscation With Ferroelectric Active Interconnects.
SM Ningrum,Tongguang Yu,Yixin Xu,Shan Deng,Zijian Zhao,Nicholas Jao,You Sung Kim,Stefan Dunkel,Sven Beyer,Kai Ni,Sumitha George,Vijaykrishnan Narayanan +11 more
TL;DR: In this paper, an efficient hardware encryption technique with minimal complexity and overheads based on ferroelectric field-effect transistor (FeFET) active interconnects is proposed, which provides run-time reconfigurable inverter-buffer logic by utilizing the threshold voltage programmability of the FeFETs.
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A Module-Level Configuration Methodology for Programmable Camouflaged Logic
Jianfeng Wang,Zhonghao Chen,Jiahao Zhang,Yixin Xu,Tongguang Yu,Enze Ye,Ziheng Zheng,Huazhong Yang,Sumitha George,Yongpan Liu,N. Vijaykrishnan,Xueqing Li +11 more
TL;DR: This work proposes a novel module-level configuration methodology for programmable camouflaged logic that can be implemented without additional hardware ports and with negligible resources, and proves theoretically that the configuration of the programmable camouflaged logic cells can be achieved through the inputs and netlist of the original module.
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ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key
Jianfeng Wang,Zhonghao Chen,Jiahao Zhang,Yixin Xu,Tongguang Yu,Enze Ye,Zi-Fan Zheng,Huazhong Yang,Sumitha George,Yongpan Liu,N. Vijaykrishnan,Xueqing Li +11 more
TL;DR: In this work, the key is dynamically generated by utilizing the huge space of a CPU core, and the unlocking is performed implicitly through the interconnection inside the chip, to mitigate the reverse engineering and removal attack.
Ferroelectric FET based Context-Switching FPGA Enabling Dynamic Reconfiguration for Adaptive Deep Learning Machines
Yixin Xu,Zijian Zhao,Yi Xiao,Tongguang Yu,Halid Mulaosmanovic,Dominik Kleimaier,Stefan Duenkel,Sven Beyer,Xiao Gong,Rajiv Joshi,X. Sharon Hu,Shi-ling Wen,Amanda Rios,Kiran Kumar Lekkala,Laurent Itti,Eric D. Homan,Sumitha George,Vijaykrishnan Narayanan,Kai Ni +18 more
TL;DR: In this article , Ni et al. proposed a method to improve the performance of the global-Foundries Fab1 LLC and Co. KG, Dresden, Germany, Germany.