46 Papers
255 Citations
Thomas Ernst is an academic researcher from French Alternative Energies and Atomic Energy Commission. The author has contributed to research in topics: Transistor & Nanowire. The author has an hindex of 8, co-authored 46 publications. Previous affiliations of Thomas Ernst include Commissariat à l'énergie atomique et aux énergies alternatives & Alternatives.
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Papers
Analog/RF Performance of Multichannel SOI MOSFET
Tao Chuan Lim,E. Bernard,O. Rozeau,Thomas Ernst,Bernard Guillaumot,N. Vulliet,C. Buj-Dufournet,M. Paccaud,Sylvie Lepilliet,Gilles Dambrine,Francois Danneville +10 more
TL;DR: In this article, a 3-D multichannel SOI MOSFET (MCFET) with a gate length of 50 nm is presented, and the sensitivity of the spacer length to the RF/analog performances is experimentally analyzed and validated using ac simulation.
51
Patent
Field-effect microelectronic device, capable of forming one or several transistor channels
Thomas Ernst,Stephan Borel +1 more
- 21 Oct 2004
TL;DR: In this paper, the authors describe a field effect microelectronic device that includes a substrate as well as at least one improved structure capable of forming one or more transistor channels, formed by a plurality of bars stacked on the substrate.
41
Patent
Structure and production process of a microelectronic 3d memory device of flash nand type
Thomas Ernst,Gabriel Molas,Barbara De Salvo,Stéphanel Becu +3 more
- 10 Jul 2009
TL;DR: In this paper, a microelectronic flash memory device including a plurality of memory cells including transistors fitted with a matrix of channels connecting a block of common source to a second block on which bit lines rest is described.
34
Patent
Production of a transistor gate on a multibranch channel structure and means for isolating this gate from the source and drain regions
Thomas Ernst,Christian Isheden +1 more
- 28 Dec 2006
TL;DR: In this article, a method for fabricating a microelectronic device comprising of a support, an etched stack of thin layers comprising: at least one first block and at least two second blocks resting on the support, in which at least drain regions and source regions, respectively, are capable of being formed, several semiconductor bars connecting a first zone and another zone of the second block, and able to form a multi-branch transistor channel, or several transistor channels, the device also comprising: a gate surrounding said bars and located between the first and the second blocks, the
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Oxidation of Suspended Stacked Silicon Nanowire for Sub-10nm Cross-Section Shape Optimization
Alexandre Hubert,Jean-Philippe Colonna,Stéphane Bécu,Cecilia Dupre,V. Maffini-Alvaro,Jean-Michel Hartmann,Sébastien Pauliac,C. Vizioz,F. Aussenac,Catherine Carabasse,Vincent Delaye,Thomas Ernst,Simon Deleonibus +12 more
- 24 Oct 2008
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