This study investigates the response of synchronous dynamic random access memories to energetic electrons and especially the possibility of electrons to cause stuck bits in these memories. Three different memories with different node sizes (63, 72, and 110 nm) were tested. Electrons with energies between 6 and 200 MeV were used at RADiation Effects Facility (RADEF) in Jyvaskyla, Finland, and at Very energetic Electron facility for Space Planetary Exploration missions in harsh Radiative environments (VESPER) in The European Organization for Nuclear Research (CERN), Switzerland. Photon irradiation was also performed in Jyvaskyla. In these irradiation tests, stuck bits originating from electron-induced single-event effects (SEEs) were found, as well as single bit-flips from single electrons. To the best knowledge of the authors, this is the first time that stuck bits from single-electron events have been reported in the literature. It is argued in the article that the single-event bit-flips and stuck bits are caused by the same damage mechanism, which would be large displacement damage clusters, and that the two different fault modes represent different amounts of damage to the memory cell. After a large particle fluence, a rapid increase in the error rate was observed, originating from the accumulation of smaller displacement damage clusters in the memory cells. The 110-nm memory was a candidate component to fly on the European Space Agency (ESA) JUpiter ICy moons Explorer (JUICE) mission, so the SEE cross section as a function of electron energy was compared to the expected electron environment encountered by JUICE to estimate the error rates during the mission.

/pdf/electron-induced-upsets-and-stuck-bits-in-sdrams-in-the-5a00tpytb1.pdf

Electron-Induced Upsets and Stuck Bits in SDRAMs in the Jovian Environment

In this work, the parasitic discrete fluctuation of dark current (dc) called random telegraph signal (RTS) is analyzed in image sensors based on two different semiconductor materials: InSb and silicon. The results show that this dc-RTS phenomenon exhibits similar characteristics on both technologies strongly suggesting a common physical origin. This conclusion is extended to InGaAs and HgCdTe (also referred to as MCT)-based image sensors by comparing the presented results to the existing literature.

/pdf/comparison-of-dark-current-random-telegraph-signals-in-ynmhdq1laj.pdf

Comparison of Dark Current Random Telegraph Signals in Silicon and InSb-Based Photodetector Pixel Arrays

Dynamic random access memory (DRAM) bits can be erroneously flipped when the row near the error bits is repeatedly accessed with the activate and precharge commands in a process called row hammering. The trap at an Si–SiO2 interface has been previously reported as the leading cause of such errors. The number of row hammering required for flipping bits initially decreases and then saturates with the increases in the row precharge time (<inline-formula> <tex-math notation="LaTeX">$t_{\mathrm {RP}}$ </tex-math></inline-formula>). The DRAM timing parameter is the time interval between an activate command and a precharge command. This study uses the saturation <inline-formula> <tex-math notation="LaTeX">$t_{\mathrm {RP}}$ </tex-math></inline-formula> to estimate the electron emission time of the trap associated with a DRAM bit error. During <inline-formula> <tex-math notation="LaTeX">$t_{\mathrm {RP}}$ </tex-math></inline-formula> time, the traps at the Si–SiO2 interface emit the trapped electrons. There are more chances of emission as <inline-formula> <tex-math notation="LaTeX">$t_{\mathrm {RP}}$ </tex-math></inline-formula> increases, and less row hammering is needed. The emission time of a trapped electron is experimentally measured herein using commercial DDR4 components. The components are irradiated with gamma rays to induce the interface traps. The trap characteristics are then extracted without requiring an additional measurement setup with a device-level preparation. The trap energies with respect to the mid-band at the Si–SiO2 interface are 0.118–0.280 eV. The trap energies are distributed within approximately 5.6 kT energies at room temperature.

Estimation of the Trap Energy Characteristics of Row Hammer-Affected Cells in Gamma-Irradiated DDR4 DRAM

In this study, static and dynamic test methods were used to define the response of a self-refresh DRAM under thermal neutron irradiation. The neutron-induced failures were investigated and characterized by event cross-sections, soft-error rate and bitmaps evaluations, leading to an identification of permanent and temporarily stuck cells, block errors, and single-bit upsets.

/pdf/effects-of-thermal-neutron-irradiation-on-a-self-refresh-3haxkabk34.pdf

Effects of Thermal Neutron Irradiation on a Self-Refresh DRAM

As DRAM chips are scaling down, the reduction of retention time and reliability issue are getting more and more crucial. Through 3D TCAD simulations, the trap location and type effects on the access transistor leakage and reliability have been studied. The results indicate that different trap locations can induce opposite passing gate effects, and the GOX/Si interface traps are more important than STI/Si interface traps for suppressing the passing world line effects. Besides, the STI/Si interface traps will result in a coupling between passing word line effects and variable retention time(VRT) failure, which will make it difficult to capture and repair the VRT fail bits. Finally, some test methods have been suggested to capture more VRT cell to improve yield. This study has illustrated the correlation between the trap position and different failure model. It will guide manufactures to check the STI or gate oxide process according to the issues they faced.

Trap-Assisted Passing Word Line Leakage and Variable Retention Time in DRAM

The effect of gamma-ray and neutron radiations on the variable retention time (VRT) phenomenon occurring in dynamic random access memory (DRAM) is studied. It is shown that both ionizing radiation and nonionizing radiation induce VRT behaviors in DRAM cells. It demonstrates that both Si/SiO2 interface states and silicon bulk defects can be a source of VRT. It is also highlighted that radiation-induced VRT in DRAMs is very similar to the radiation-induced dark current random telegraph signal in image sensors. Both phenomena probably share the same origin, but high-magnitude electric fields seem to play an important role in VRT only. Defect structural fluctuations (without change of charge state) seem to be the root cause of the observed VRT whereas processes involving trapping and emission of charge carriers are unlikely to be a source of VRT. VRT also appears to be the most probable cause of intermittent stuck bits in irradiated DRAMs.

/pdf/radiation-induced-variable-retention-time-in-dynamic-random-kb4v9kqk2g.pdf

Radiation-Induced Variable Retention Time in Dynamic Random Access Memories

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Radiation-Induced Variable Retention Time in Dynamic Random Access Memories