A communication system supports multiple modulation/coding schemes. When connection quality drops below an acceptable threshold, ARQ techniques use an alternative modulation/coding scheme which is more resistant to noise and/or interference. Flexible resegmentation and mapping of information blocks is supported.

Method and system for block arq with reselection of fec coding and/or modulation

A method for controlling errors in a wireless link layer using a simultaneous multiple copy scheme and an adaptive forward error correction (FEC) scheme in a wideband wireless communication is provided. The method for controlling errors in a link layer in wideband wireless communication using an automatic repeat request (ARQ) scheme, in which a wideband wireless channel is used for communication between a first node and a second node, includes the steps of (a) estimating the error ratio of a forward (a direction in which a cell is transmitted from the first node to the second node) channel using the state of a backward (a direction in which a cell is transmitted from the second node to the first node) channel, and transmitting a cell, in which a forward error correction (FEC) code having an encoding ratio that varies depending on the estimated error ratio is included in a protocol data unit (PDU) of a wireless link layer, through the forward channel and (b) re-transmitting the copy of a cell transmitted in the step (a), when feedback information that indicates that an error exists in the cell transmitted in the step (a) is received through the backward channel. It is possible to reduce the number of times of re-transmission by improving the probability of correcting forward errors using more error controlling bits as the state of the channel is worse and to minimize the waste of resources using less error controlling bits as the state of the channel is better, to thus obtain the optimal performance and guarantee the minimum delay time.

Method for controlling errors in link layer in wideband wireless communication and computer readable media therefor

A method for the adaptive control of a forward error correction code for transmission between a terrestrial cell/packet switch at a first terminal and a satellite/wireless network connecting to a second terminal, including the steps of: calculating a byte error rate associated with communication signals received by the first terminal (500), determining a forward error correction code length based on the byte error rate (510), transmitting the forward error correction code length to the second terminal (520).

Method and apparatus for adaptive control of forward error correction codes

Block cyclic redundancy check (CRC) codes represent a popular and powerful class of error detection techniques in modern data communication systems. Though efficient, CRCs can detect errors only after an entire block of data has been received and processed. We propose a new "continuous" error detection scheme using arithmetic coding that provides a novel tradeoff between the amount of added redundancy and the amount of time needed to detect an error once it occurs. We demonstrate how the new error detection framework improves the overall performance of transmission systems, and show how sizeable performance gains can be attained. We focus on two popular scenarios: (i) automatic repeat request (ARQ) based transmission; and (ii) forward error correction frameworks based on (serially) concatenated coding systems involving an inner error-correction code and an outer error-detection code.

Image transmission using arithmetic coding based continuous error detection

A method is provided for reliably receiving digital information from a transmitting device. The information to be received is arranged in discrete subunits (201, 202, 203, 204, 301, 302, 303, 304) so that a predetermined number of subunits correspond to a superunit (200, 300). It is encoded with a certain error detection code (402), corresponding to a certain error detection decoding method, and additionally with a certain error correction code (403), corresponding to a certain error correction decoding method. According to the invention a superunit is error correction decoded (405), and during the error correction decoding (405), the decoding reliability of each subunit of the superunit to be decoded is separately estimated. The error correction decoded superunit is error detection decoded (406), and during the error detection decoding it is detected, whether or not there were errors in the superunit to be decoded. Partial corrective action (407, 408, 409, 450, 451) is arranged for on the decoded superunit on the basis of the estimated reliabilities of the subunits.

Method and arrangement for the reliable transmission of packet data

In order to combine an ARQ system and an FEC system, an error correction code is inserted between an error detection code for a variable-length ARQ frame and a frame boundary flag pattern. Information to be transmitted is divided into blocks having a suitable length by a block divider in accordance with a line quality judged by-a line quality judger, and then subjected to a framing operation by an information frame preparer. The information subjected to the framing operation is attached with a CRC code by a CRC code generation/application circuit, subjected by a zero insertion circuit to an insertion of a suitable number of zero bits therein to provide a distinguished frame boundary with a flag, and then transmitted.

Data communication system

When a receiver unit receives second data composed of check bits and first data obtained by encoding information bits indicating the communication contents by way of a first generator matrix based on a first generating polynomial, and then further encoding the first data by way of a second generator matrix of an irreducible standard form based on a second generating polynomial, an error location detector decodes the second data received by way of a second check matrix that is orthogonal to the second generator matrix so as to detect errors produced in the first data. A dummy syndrome generator generates a dummy syndrome of the error produced in the information bits based on the detected error location and on the first generating polynomial. A syndrome generator takes the product of the data obtained by excluding the check bits from the second data received by the receiver unit and the first check matrix that is orthogonal to the first generator matrix so as to generate a syndrome that indicates the error syndrome produced in the information bits. Finally, an error corrector corrects errors produced in the information bits if the dummy syndrome generated by the dummy syndrome generator is the same as the syndrome generated by the syndrome generator.

Error correction apparatus and method

PURPOSE:To obtain an error correction device which is reduced in processing delay by efficiently judging the propriety of correction when the reliability of communication information is improved by using an error correction code and an error detection code together. CONSTITUTION:In a reception processing part 2, the pseudo syndrome corresponding to a syndrome for detection is calculated backward from the syndrome for correction that a syndrome generation part 21 for error correction generates. By comparing the pseudo syndrome with the syndrome for detection that a syndrome generation part 22 for error detection generates, the propriety of a correction is judged.

Error correction device

In order to combine an ARQ system and an FEC system, an error correction code is inserted between an error detection code for a variable-length ARQ frame and a frame boundary flag pattern. Information to be transmitted is divided into blocks having a suitable length by a block divider (11) in accordance with a line quality judged by a line quality judger (37), and then subjected to a framing operation by an information frame preparer (12). The information subjected to the framing operation is attached with a CRC code by a CRC code generation/application circuit (16), subjected by a zero insertion circuit (18) to an insertion of a suitable number of zero bits therein to provide a distinguished frame boundary with a flag, and the transmitted.

Data communication system using an adaptive hybrid ARQ scheme

Datenübertragungssystem mit adaptivem Hybrid-ARQ-Verfahren

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