T. Kaija
Tampere University of Technology
16 Papers
35 Citations
T. Kaija is an academic researcher from Tampere University of Technology. The author has contributed to research in topics: Test fixture & Fixture. The author has an hindex of 6, co-authored 16 publications.
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Papers
Design and Manufacturing of Robust Textile Antennas for Harsh Environments
TL;DR: The potential performance reduction due to the material characteristics is addressed in this paper, and methods to improve performance robustness are introduced.
113
Body-Worn Antennas Making a Splash: Lifejacket-Integrated Antennas for Global Search and Rescue Satellite System
Juha Lilja,V. Pynttari,T. Kaija,Riku Makinen,Eerik Halonen,Hannu Sillanpaa,J. Heikkinen,Matti Mäntysalo,P. Salonen,P. de Maagt +9 more
TL;DR: The design, development, and verification for a body-worn antenna system interfaced with commercial Cospas-Sarsat personal locator beacons (PLBs), where the implemented system is integrated within an inflatable live vest.
61
Environmental protection of inkjet-printed Ag conductors
Eerik Halonen,Vesa Pynttari,Juha Lilja,Hannu Sillanpaa,Matti Mäntysalo,J. Heikkinen,Riku Makinen,T. Kaija,P. Salonen +8 more
TL;DR: In this article, two different polymer films were used as the substrate materials and the patterns were exposed to humidity and salt fog and the electrical performance (sheet resistance and RF performance) as well as mechanical endurance (adhesion) were measured before and after the environmental tests.
31
The optimization of on-wafer shield-based test fixture layout
TL;DR: In this article, the effect of layout design on shield-based test fixture parasitic components is studied, and the guidelines for shield based test fixture layout design are given, where a slotted ground plane with different slot orientation, the use of ground-bar extensions in a ground-shielded test fixture and the upgrade of a ground shielded test fixture to a fully shielded structure with a common ground.
10
An experimental study of scalability in shield-based on-wafer CMOS test fixtures
T. Kaija,E.O. Ristolainen +1 more
TL;DR: An improved method for applying bi-directional scaling to on-wafer shield-based test fixtures is proposed in this paper, taking into account the parasitic series resistance, series inductance, and parallel capacitance that are present in the test fixture.
6