T. Ando
IBM
20 Papers
101 Citations
T. Ando is an academic researcher from IBM. The author has contributed to research in topics: Metal gate & Electron mobility. The author has an hindex of 9, co-authored 20 publications.
Chat about Author
Papers
High-mobility High-Ge-Content Si 1−x Ge x -OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width
Pouya Hashemi,T. Ando,Karthik Balakrishnan,John Bruley,Sebastian Engelmann,John A. Ott,Vijay Narayanan,D.-G. Park,R. Mo,Effendi Leobandung +9 more
- 16 Jun 2015
TL;DR: In this article, the authors demonstrate scaled high-Ge-content (HGC) SiGe-OI finFET with Ge up to 71% using a CMOS-compatible approach.
33
Toward High Performance SiGe Channel CMOS: Design of High Electron Mobility in SiGe nFinFETs Outperforming Si
Lee Choonghyun,Richard G. Southwick,Shogo Mochizuki,James Chingwei Li,Xin Miao,Miaomiao Wang,Ruqiang Bao,Injo Ok,T. Ando,Pouya Hashemi,Dechao Guo,Vijay Narayanan,Nicolas Loubet,Hemanth Jagannathan +13 more
- 01 Dec 2018
TL;DR: In this paper, a series of tensile-strained SiGe nFinFETs are fabricated on various strain relaxed buffer layers by taking into account the minimum threading dislocation density and strain engineering.
24
High Performance InGaAs Gate-All-Around Nanosheet FET on Si Using Template Assisted Selective Epitaxy
Sungjae Lee,Cheng-Wei Cheng,Xiao Sun,Christopher P. D'Emic,Hiroyuki Miyazoe,Martin M. Frank,Michael F. Lofaro,John Bruley,Pouya Hashemi,John A. Ott,T. Ando,William T. Spratt,Guy M. Cohen,Christian Lavoie,Robert L. Bruce,J. Patel,Heinz Schmid,Lukas Czornomaz,Vijay Narayanan,R. Mo,Effendi Leobandung +20 more
- 01 Dec 2018
TL;DR: In this article, the InGaAs gate-all-around nanosheet NFETs on Si substrate using template-assisted-selective-epitaxy (TASE) and a gate-last process with thermal budget advantages were reported.
21
Simple Gate Metal Anneal (SIGMA) stack for FinFET Replacement Metal Gate toward 14nm and beyond
T. Ando,Balaji Kannan,Unoh Kwon,W. Lai,Barry Linder,Eduard A. Cartier,Richard Haight,Matthew Copel,John Bruley,Siddarth A. Krishnan,Vijay Narayanan +10 more
- 09 Jun 2014
TL;DR: The Simple Gate Metal Anneal (SIGMA) as discussed by the authors stack for FinFET Replacement Metal Gate (RMG) technology uses only thin TiN layers as work function (WF)-setting metals for CMOS integration.
19
Origins of Effective Work Function Roll-Off Behavior for High-κ Last Replacement Metal Gate Stacks
TL;DR: In this paper, the authors investigated the origin of effective work function (EWF) roll-off behavior accompanied by equivalent oxide thickness scaling for high- κ last replacement metal gate (RMG) stacks using a low-temperature interfacial layer (IL) scavenging technique.
18